AMD Piledriver rumours ... and expert conjecture

[Reynod]

We have had several requests for a sticky on AMD's yet to be released Piledriver architecture ... so here it is.

I want to make a few things clear though.

Post a question relevant to the topic, or information about the topic, or it will be deleted.

Post any negative personal comments about another user ... and they will be deleted.

Post flame baiting comments about the blue, red and green team and they will be deleted.

Enjoy ...

 

[viridiancrystal]

I cant tell if the 3.8 ghz Trinity is good or bad news for piledriver 😛 A bit of both I suppose.

 

[-Fran-]

I cant tell if the 3.8 ghz Trinity is good or bad news for piledriver 😛 A bit of both I suppose.

High clocks = good thing -> better process than initial 32nm BD it seems.

PD core = we'll-see thing -> since BD didn't do squat for throughout put against PhenomII, PD being on equal footing as the Husky (or was it Stars? XD) core is very unlikely.

That's CPU wise though... The promise is "the CPU will keep up with the new graphics part to not dissapoint as better value". I'd say we'll have to wait and see, lol.

Cheers!

 

[viridiancrystal]

High clocks = good thing -> better process than initial 32nm BD it seems.

PD core = we'll-see thing -> since BD didn't do squat for throughout put against PhenomII, PD being on equal footing as the Husky (or was it Stars? XD) core is very unlikely.

That's CPU wise though... The promise is "the CPU will keep up with the new graphics part to not dissapoint as better value". I'd say we'll have to wait and see, lol.

Cheers!

It is good and bad at the same time:

It means PD may have a much lower power usage than BD, which is much in its favor if AMD manages even a 5% IPC increase, because it can be clocked much higher as well.

It means AMD is having difficulty even getting a lot of IPC improvements, or they got a huge improvement and want to show it off with high clocks 😛. The latter is rather unlikely much to my disappointment.

 

[palladin9479]

Some of that heat comes from driving the wide memory buses off chip. Bringing them internal is a power/heat savings because you're not having to drive signals across 6 inches of PCB. The voltage can be lowered as well. All adding up to a fairly big savings. In some estimations a high end PC can use 40 Watts in just the DDR3 bus.

3D Stacking is mostly about putting memory on logic. They do this on the iPhone even.
In some cases multiple memory types. CPU + NAND Flash + DRAM.

And ~most~ of heat is from the processing units doing the work your issuing them.

I'm really laughing that you actually thought the voltage to "drive the memory bus" is creating any significant amounts of heat. I call upon the resident overclockers, the kings of thermal load management, as evidence that the CPU core clock (aka processor speed) is the primary control over heat load. Take the 970BE, default 3.5Ghz with a DDR3-1600 dual memory bus. I can clock it at 2.0Ghz and it will be significantly cooler, yet still have the exact same 128-bit DDR3-1600 dual channel memory bus. I can clock it at 4.2Ghz and it will be significantly hotter, to hot for Air coolers in general, and still have the exact same 128-bit DDR3-1600 dual channel memory bus.

Removing the memory bus to put a small amount of memory ontop will do nothing for the processing components heat load yet increase the heat load of the entire chip resulting in lower max clocks.

 

[palladin9479]

True, but as most DoD stuff is embedded, you more often see a PowerPC based arch with some embedded realtime OS. Then again, guess it depends on what task the HW is being used for...

*Cough* C2/C4I

http://www.c4i.org/whatisc4i.html

DISA spends billions on those programs. Several of those programs require centralized servers somewhere, preferably at a command compound nearby.

For appliances, venders are asked to develop them and go through the contracting / purchasing process (PEO Soldier usually).

 

[g4114rd0]

@ Trinity A10-5800K assume that the base prices starting at 140$ or maybe more.
After all, they not only compete with other Llanos APUs (Easy Thing).
There is something you must always remember, bench versus i3-3150 (or wherever has been named).
If you follow the wishes below PD Project, real improvement will be on “vishiera” (Just in case any...).

 

[de5_Roy]

how about 100W for 3.8/4.2 ghz

http://www.fudzilla.com/home/item/25919-amd-trinity-lineup-detailed

'Trinity will certainly pack a punch with up to 4.2GHz Boost CPU clock, up to 800MHz GPU clock, up to 384 GCN stream processors and all at reasonable 100W TDP' - gcn cores? afaik, the only 'gcn' in trinity is the transcoding logic called 'vce' (video compression engine, competitor or intel's quick sync) and something about display connectivity.
100w cpus need good 3rd party coolers to keep 'em running cool and quiet.

@ Trinity A10-5800K assume that the base prices starting at 140$ or maybe more.
After all, they not only compete with other Llanos APUs (Easy Thing).
There is something you must always remember, bench versus i3-3150 (or wherever has been named).
If you follow the wishes below PD Project, real improvement will be on “vishiera” (Just in case any...).

i can't help thinking that at $140, a better cpu+ low end gfx card combo can be put together that will outperform the 5800k (taking oc into account - add a cooler's price). if we take dual graphics into consideration, the highest performing crossfirable gfx card would cost around $100 (right now, $140 3870k + $80-100 6670). it doesn't sound economic.
before i get barraged by tech jargons and stuff, lower watt apus look very promising. hopefully they'd be great for htpc. if the apus are more available compared to when llano launched, may be oems will use more amd apus.

 

[g4114rd0]

i can't help thinking that at $140, a better cpu+ low end gfx card combo can be put together that will outperform the 5800k (taking oc into account - add a cooler's price). if we take dual graphics into consideration, the highest performing crossfirable gfx card would cost around $100 (right now, $140 3870k + $80-100 6670). it doesn't sound economic.
before i get barraged by tech jargons and stuff, lower watt apus look very promising. hopefully they'd be great for htpc. if the apus are more available compared to when llano launched, may be oems will use more amd apus.

Thanks for explain more clearly, the same point of view.

 

[gamerk316]

*Cough* C2/C4I

http://www.c4i.org/whatisc4i.html

DISA spends billions on those programs. Several of those programs require centralized servers somewhere, preferably at a command compound nearby.

For appliances, venders are asked to develop them and go through the contracting / purchasing process (PEO Soldier usually).

^^ Sure, the brand new stuff that connects to servers using the latest technology. Me?

http://en.wikipedia.org/wiki/IBM_AP-101

 

[truegenius]

hey, can anyone tell me the efficiency of multicore scaling of agena, daneb, zosma, thuban, and zambazi core in percentage?

 

[truegenius]

also does using 'Cinebench R10 - single/Multi-Threaded Benchmark' comparision of anandtech bench is a good way to compare scaling?

 

[truegenius]

ok
after some calculations, i found that a core of bd is around 70percent weaker than sb (i mean any bd compared to any sb) when clocked at same speed.

😱 70percent weak, thats too much.

Also i found that smt of bd is only ~40-50% and ht of sb is ~10% effective.

That means if 1 is using a thread on second core of module then they will get only 40-50% performance from that core/thread provided that first core is already processing a heavy thread.

To check that, some bd owners can try this experiment.
1. Use Cinebench R10 - multi Threaded Benchmark on module 1 only, note down the score.
2. then use Cinebench R10 - single-Threaded Benchmark on core 0 (and let the other cores to idle), note down the results.
3. Use Cinebench R10 - Multi-Threaded Benchmark on core 0,2,4,6 only , note down the results.

You will found only 40-50% increase in score when using full module in comparision to single core of that module.

Step 3 is to compare scaliing efinciency of bd' full real cores. (eficiency of full cpu is only 60% when considering every second thread as a real core).

 

[g4114rd0]

Radeon HD 7750 and HD 7770 Available for Pre-Order

http://www.cpu-world.com/news_2012/2012021402_Radeon_HD_7750_and_HD_7770_Available_for_Pre-Order.html

 

[-Fran-]

video-now-available-on

http://verdetrol.com/

That video uses the sexual-nuendo very poorly TBH. Still got a smirk from me, at least 😛

Anyway, what's the final trolling? "nVidia makes you feel horny about performance and we don't"? xD

Cheers!

 

[fazers_on_stun]

And ~most~ of heat is from the processing units doing the work your issuing them.

I'm really laughing that you actually thought the voltage to "drive the memory bus" is creating any significant amounts of heat. I call upon the resident overclockers, the kings of thermal load management, as evidence that the CPU core clock (aka processor speed) is the primary control over heat load. Take the 970BE, default 3.5Ghz with a DDR3-1600 dual memory bus. I can clock it at 2.0Ghz and it will be significantly cooler, yet still have the exact same 128-bit DDR3-1600 dual channel memory bus. I can clock it at 4.2Ghz and it will be significantly hotter, to hot for Air coolers in general, and still have the exact same 128-bit DDR3-1600 dual channel memory bus.

Removing the memory bus to put a small amount of memory ontop will do nothing for the processing components heat load yet increase the heat load of the entire chip resulting in lower max clocks.

Which is why Intel is supposedly using low-power GDDR, a gig at least: http://semiaccurate.com/2011/11/17/intel%e2%80%99s-22nm-knights-corner/ and http://semiaccurate.com/2010/12/29/intel-puts-gpu-memory-ivy-bridge/. Of course, the bit about IVB is probably wrong as I have heard later rumors that Intel plans to put GDDR on Haswell instead.

 

[fazers_on_stun]

ok
after some calculations, i found that a core of bd is around 70percent weaker than sb (i mean any bd compared to any sb) when clocked at same speed.

😱 70percent weak, thats too much.

Also i found that smt of bd is only ~40-50% and ht of sb is ~10% effective.

That means if 1 is using a thread on second core of module then they will get only 40-50% performance from that core/thread provided that first core is already processing a heavy thread.

To check that, some bd owners can try this experiment.
1. Use Cinebench R10 - multi Threaded Benchmark on module 1 only, note down the score.
2. then use Cinebench R10 - single-Threaded Benchmark on core 0 (and let the other cores to idle), note down the results.
3. Use Cinebench R10 - Multi-Threaded Benchmark on core 0,2,4,6 only , note down the results.

You will found only 40-50% increase in score when using full module in comparision to single core of that module.

Step 3 is to compare scaliing efinciency of bd' full real cores. (eficiency of full cpu is only 60% when considering every second thread as a real core).

Heh, well the fanbois were insisting that BD's CMT was actually 90% of a full core performance - check out the huge 200+ page thread on BD, where supposedly the first core operates at 100% and the 2nd at 80% (not particularly symmetrical seeing as how both cores are identical..).

 

[esrever]

Heh, well the fanbois were insisting that BD's CMT was actually 90% of a full core performance - check out the huge 200+ page thread on BD, where supposedly the first core operates at 100% and the 2nd at 80% (not particularly symmetrical seeing as how both cores are identical..).

it all depends on the software.

 

[gamerk316]

Uh oh...

Eric Demers, AMD Corporate Vice President and CTO, Graphics Business Unit, has decided leave AMD to pursue other opportunities.

AMD Chief Technology Officer Mark Papermaster will assume interim responsibility for the Graphics Business Unit CTO role until a replacement is found.

AMD remains fully committed to our critical graphics IP development and discrete GPU products. We have a tremendous depth of talent in our organization, a game plan that is resonating with our customers and our team, and we are continuing to bring graphics-performance-leading products to market. We will attract the right technology leader for this role.

We thank Eric for his contributions to the business and wish him well in his future endeavors.

 

[esrever]

even with the 'hotfixes' from MS and AMD together, it didn't help.
software can only mask do much.
sooner or later the truth comes out and it's the processor.
and we're not mentioning the single threaded performance, that's a moot point.

I just meant about the core scailing, some software scales well like 7 zip and some don't, like cinebench.

I read some articles on interlagos a while back and the 16 cores seem to scale decently, more or less equal to 90* of a star core.

Different benches are constrained by different things, the crappy cache probably slows bulldozer more than scaling.

 

[gamerk316]

it all depends on the software.

But again, you are limited by how well you can parallize a program. If 90% of the program is sequential, then you can not ever gain more then 10% performance by adding more cores.

 

[esrever]

it all depends on the software.

But again, you are limited by how well you can parallize a program. If 90% of the program is sequential, then you can not ever gain more then 10% performance by adding more cores.

true as well.

 

[fazers_on_stun]

Uh oh...

Eric Demers, AMD Corporate Vice President and CTO, Graphics Business Unit, has decided leave AMD to pursue other opportunities.

AMD Chief Technology Officer Mark Papermaster will assume interim responsibility for the Graphics Business Unit CTO role until a replacement is found.

AMD remains fully committed to our critical graphics IP development and discrete GPU products. We have a tremendous depth of talent in our organization, a game plan that is resonating with our customers and our team, and we are continuing to bring graphics-performance-leading products to market. We will attract the right technology leader for this role.

We thank Eric for his contributions to the business and wish him well in his future endeavors.

Heh, maybe Intel hired him away 😛..

 

[triny]

Heh, maybe Intel hired him away 😛..

By the time excavator rolls round amd won't need him.

 

[jdwii]

Heh, well the fanbois were insisting that BD's CMT was actually 90% of a full core performance - check out the huge 200+ page thread on BD, where supposedly the first core operates at 100% and the 2nd at 80% (not particularly symmetrical seeing as how both cores are identical..).

I've figured out its about 78% scaling per core. Versus like 88-90% for Phenom.

not sure about that, but what I can say is even my i5-2500K is better than the Phenom II x6 in Cinebench 11.5

What?

On stock? Or overclock i get

6.91 With my 6 core OC to 3.9Ghz and i see this site got a 5.84 on stock

http://www.legitreviews.com/article/1481/5/

And the 2500K gets a 5.42

http://www.legitreviews.com/article/1501/16/

 

[fazers_on_stun]

By the time excavator rolls round amd won't need him.

If Trinity/Piledriver doesn't do well, AMD may just cancel future generations. They've done it before (the QuadFX version of Barcelona for instance, which left all the purchasers high and dry for upgrades).