Discussion AMD Ryzen MegaThread! FAQ and Resources

[8350rocks]

Seems that GCC and Ryzen aren't playing well together right now: https://www.phoronix.com/scan.php?page=news_item&px=Ryzen-Compiler-Issues

As I understand it, AMD are submitting some updated compiler code to GCC to resolve this.

 

[randomizer]

As I understand it, AMD are submitting some updated compiler code to GCC to resolve this.

I haven't seen any significant progress reported anywhere, at least not from AMD. The only person who didn't appear to be stabbing in the dark (eg. playing with LLC or disabling ASLR) is the guy that develops DragonFly BSD, who says he may have found a hardware issue that could be resolved with a microcode update: https://www.phoronix.com/forums/forum/hardware/processors-memory/955368-some-ryzen-linux-users-are-facing-issues-with-heavy-compilation-loads?p=955498#post955498

 

[juanrga]

Seems that GCC and Ryzen aren't playing well together right now: https://www.phoronix.com/scan.php?page=news_item&px=Ryzen-Compiler-Issues

As I understand it, AMD are submitting some updated compiler code to GCC to resolve this.

Nope. This is part of the famous SMT/uop cache bug that was found in early engineering samples. Recall that first engineering samples had uop or SMT disabled due to this bug. It looks as it was only partially corrected in retail chips.

AMD answer is again to disable SMT

https://community.amd.com/thread/216084
https://community.amd.com/message/2796982

Probably a microcode update will fix this.

 

[Nope 1151]

Seems that GCC and Ryzen aren't playing well together right now: https://www.phoronix.com/scan.php?page=news_item&px=Ryzen-Compiler-Issues

As I understand it, AMD are submitting some updated compiler code to GCC to resolve this.

Nope. This is part of the famous SMT/uop cache bug that was found in early engineering samples. Recall that first engineering samples had uop or SMT disabled due to this bug. It looks as it was only partially corrected in retail chips.

AMD answer is again to disable SMT

https://community.amd.com/thread/216084
https://community.amd.com/message/2796982

Probably a microcode update will fix this.

I've seen some talk on the Gentoo forums that disabling SMT does not solve the issue. Could it be a design flaw of the processor itself? Or maybe they are saving the bugfix for Threadripper?

 

[-Fran-]

All CPUs come with some sequences of instructions that cause incorrect/weird/bad behavior. Most of the time they are patchable through microcode into the BIOS or simply re-arranging the compiler to not use those in the ASM code; this one though is a place where no one wants to be though, since it usually breaks some binaries out there. When they are not patchable, that means the problem goes deeper and the CPU must be fixed altogether.

I'd stay tuned to what AMD has to say about it.

Cheers!

 

[8350rocks]

As I understand it, AMD are submitting some updated compiler code to GCC to resolve this.

I haven't seen any significant progress reported anywhere, at least not from AMD. The only person who didn't appear to be stabbing in the dark (eg. playing with LLC or disabling ASLR) is the guy that develops DragonFly BSD, who says he may have found a hardware issue that could be resolved with a microcode update: https://www.phoronix.com/forums/forum/hardware/processors-memory/955368-some-ryzen-linux-users-are-facing-issues-with-heavy-compilation-loads?p=955498#post955498

One of their linux devs was in a reddit thread talking about they were working through it...microcode update coming soon.

 

[imrazor]

Found this nugget on the VMWare ESXi forums: https://communities.vmware.com/thread/561795

Apparently you can avoid the pink screen of death on the 1700/1800 with ESXi 6.5 *if* you disable SMT -OR- one core. The thread implies that you will not get a PSOD on a 1500 or 1600.

 

[randomizer]

One of their linux devs was in a reddit thread talking about they were working through it...microcode update coming soon.

The trouble with Reddit is that it's hard to find these useful tidbits because they're buried under mountains of drivel.

 

[jaymc]

One of their linux devs was in a reddit thread talking about they were working through it...microcode update coming soon.

The trouble with Reddit is that it's hard to find these useful tidbits because they're buried under mountains of drivel.

Have to agree with that. big time... I have the same issue. Tons an tons of it... hard to navigate alright.

 

[dgothi]

I see ASUS's PRIME X370-PRO BIOS 0803 Beta BIOS with AGESA 1.0.0.6 did anyone test with this beta version bios? I want to make sure before I am going to use this beta version. if this Beta is too risk, I will hold off until it is final version BIOS. I cannot wait to see how improve is RAM memory for Ryzen's motherboard.

 

[goldstone77]

I see ASUS's PRIME X370-PRO BIOS 0803 Beta BIOS with AGESA 1.0.0.6 did anyone test with this beta version bios? I want to make sure before I am going to use this beta version. if this Beta is too risk, I will hold off until it is final version BIOS. I cannot wait to see how improve is RAM memory for Ryzen's motherboard.

There have been reports of much better RAM speeds. 3600MHz is fairly easy to obtain now for most people.

 

[8350rocks]

L1Techs X399 rundown: https://www.youtube.com/watch?v=pI2F8K3Agjs

 

[juanrga]

Seems that GCC and Ryzen aren't playing well together right now: https://www.phoronix.com/scan.php?page=news_item&px=Ryzen-Compiler-Issues

As I understand it, AMD are submitting some updated compiler code to GCC to resolve this.

Nope. This is part of the famous SMT/uop cache bug that was found in early engineering samples. Recall that first engineering samples had uop or SMT disabled due to this bug. It looks as it was only partially corrected in retail chips.

AMD answer is again to disable SMT

https://community.amd.com/thread/216084
https://community.amd.com/message/2796982

Probably a microcode update will fix this.

I've seen some talk on the Gentoo forums that disabling SMT does not solve the issue. Could it be a design flaw of the processor itself? Or maybe they are saving the bugfix for Threadripper?

AMD recommends trying to disable SMT or the uop cache

https://community.amd.com/message/2801864#comment-2801864

this is working for some users but not for everyone.

This is a bug on the CPU. The CPU is not working as expected in some cases. If the bug is small it could be solved via a microcode update. If the problem is really serious, engineers will go back to the design table, will change the circuits responsible for the failure and will send the result the foundry to fabricate new CPUs.

 

[-Fran-]

AMD recommends trying to disable SMT or the uop cache

https://community.amd.com/message/2801864#comment-2801864

this is working for some users but not for everyone.

This is a bug on the CPU. The CPU is not working as expected in some cases. If the bug is small it could be solved via a microcode update. If the problem is really serious, engineers will go back to the design table, will change the circuits responsible for the failure and will send the result the foundry to fabricate new CPUs.

Nitpick on bolded: if it is recognized as a bug and needs a patch, then they'll still update in the next revision if it can be done. See TLB bug, for example. There are other similar examples that had "big" issues upfront and were corrected with a later revision instead of a new-uArch (being generous with the terminology) or generational step up.

Cheers!

 

[juanrga]

AMD recommends trying to disable SMT or the uop cache

https://community.amd.com/message/2801864#comment-2801864

this is working for some users but not for everyone.

This is a bug on the CPU. The CPU is not working as expected in some cases. If the bug is small it could be solved via a microcode update. If the problem is really serious, engineers will go back to the design table, will change the circuits responsible for the failure and will send the result the foundry to fabricate new CPUs.

Nitpick on bolded: if it is recognized as a bug and needs a patch, then they'll still update in the next revision if it can be done. See TLB bug, for example. There are other similar examples that had "big" issues upfront and were corrected with a later revision instead of a new-uArch (being generous with the terminology) or generational step up.

Yeah that update silicon often called a "respin".

 

[jaymc]

16 Core AMD Ryzen ThreadRipper available as soon as July 27th:

AMD Threadripper exclusive: Only Alienware's Area-51 will have it in 2017:
http://www.pcworld.com/article/3197759/computers/amd-threadripper-exclusive-only-alienwares-area-51-will-have-it-in-2017.html

 

[goldstone77]

16 Core AMD Ryzen ThreadRipper available as soon as July 27th:

AMD Threadripper exclusive: Only Alienware's Area-51 will have it in 2017:
http://www.pcworld.com/article/3197759/computers/amd-threadripper-exclusive-only-alienwares-area-51-will-have-it-in-2017.html

This will definitely help spread ThreadRipper out there for the masses.

 

[jdwii]

So about 2 months with Ryzen so far and i have to say i use programs that love IPC and i personally have been satisfied granted i was with Haswell as well i just personally can't tell the difference. I basically run my setup at stock most of the time and i really love having all the extra cores. I however wish i went with a better board as my Tomahawk runs its VRM hot compared to any other setup i ever personally owned.

Play Dolphin and PCSX2 just about the only 2 programs i actually use that needs high frequency+IPC and ryzen really has been fine for that. PD would have never did this for me.

 

[con635]

So about 2 months with Ryzen so far and i have to say i use programs that love IPC and i personally have been satisfied granted i was with Haswell as well i just personally can't tell the difference. I basically run my setup at stock most of the time and i really love having all the extra cores. I however wish i went with a better board as my Tomahawk runs its VRM hot compared to any other setup i ever personally owned.

Play Dolphin and PCSX2 just about the only 2 programs i actually use that needs high frequency+IPC and ryzen really has been fine for that. PD would have never did this for me.

Thanks for your comments I appreciate them, fwiw people always say 'wait for reviews' but imo commentary like your own from people like yourself is much more trustworthy and sometimes even more in depth than a mainstream review site.

 

[juanrga]

16 Core AMD Ryzen ThreadRipper available as soon as July 27th:

AMD Threadripper exclusive: Only Alienware's Area-51 will have it in 2017:
http://www.pcworld.com/article/3197759/computers/amd-threadripper-exclusive-only-alienwares-area-51-will-have-it-in-2017.html

This will definitely help spread ThreadRipper out there for the masses.

Both ThreadRipper and SKylake-X target a niche market (enthusiasts) of a niche market (desktop). No one of them target the masses.

 

[goldstone77]

16 Core AMD Ryzen ThreadRipper available as soon as July 27th:

AMD Threadripper exclusive: Only Alienware's Area-51 will have it in 2017:
http://www.pcworld.com/article/3197759/computers/amd-threadripper-exclusive-only-alienwares-area-51-will-have-it-in-2017.html

This will definitely help spread ThreadRipper out there for the masses.

Both ThreadRipper and SKylake-X target a niche market (enthusiasts) of a niche market (desktop). No one of them target the masses.

Semantics

 

[8350rocks]

>https://www.reddit.com/r/Amd/comments/6hjeuq/zen2_will_be_amds_nehalem_sandybridge_and_then/

Zen2 on 7nm HPP = 20-30% increases in clockspeed.

 

[jdwii]

16 Core AMD Ryzen ThreadRipper available as soon as July 27th:

AMD Threadripper exclusive: Only Alienware's Area-51 will have it in 2017:
http://www.pcworld.com/article/3197759/computers/amd-threadripper-exclusive-only-alienwares-area-51-will-have-it-in-2017.html

This will definitely help spread ThreadRipper out there for the masses.

Both ThreadRipper and SKylake-X target a niche market (enthusiasts) of a niche market (desktop). No one of them target the masses.

You know you are right but at the same time these are server parts and what happens when a haswell CPU that has 16 cores competes with a kaby-lake CPU with 10 cores? That's right anyone who is needing high multi core performance will pick the haswell part.. .

Granted i will argue with anyone here based on my own testing Ryzen is + or - 10% within haswell IPC

 

[Nope 1151]

https://twitter.com/CPCHardware/status/876193860946468865
In french but reads:
"Ah here: B2 stepping approach to Zen. It fixes many hardware bugs."

More importantly: "B2-step seems to focus on Uncore/SoC erratas (PCIe controllers, etc.) . I don't see many fixed bugs within the core"

So no Linux ASLR fix sadly

 

[jdwii]

https://twitter.com/CPCHardware/status/876193860946468865
In french but reads:
"Ah here: B2 stepping approach to Zen. It fixes many hardware bugs."

More importantly: "B2-step seems to focus on Uncore/SoC erratas (PCIe controllers, etc.) . I don't see many fixed bugs within the core"

So no Linux ASLR fix sadly

Some thought in the forums that the PCI-E controller was causing poorer then expected gaming results.

I personally don't know if that is true.