Discussion: AMD Ryzen

[elbert]

Yes but Zen+ core was to release 2h 2017. Thus logic would state this must be the 12 and 16 core. Has nothing to do with starship nearly 4 years later. Zen+ core is just that. More core of zen in the workstation/enthusiast space. Look at it this way. What is AMD going to offer against Intel's 10, 12, 14 and 16 core broadwell-e/p. No way will AMD just let Intel have this. AMD can't wait 4 years to launch there next or even the next after the next and compete.

As explained a hundred of times. Zen is 2017--2018 product. Zen+ is 2019 product.

As explained a hundred of times, there is no 12 and 16-core Zen die. The only Zen die is 8-core. Any Zen product is obtained from combining one or more Zen dies, but the multi-die products (Naples and Snowy Owl) are SERVER CPUs.

You post no proof while I post leaks. Again Zen+ is ever evolving and AMD has stated there will be several revisions on the 14nm. IE Zen+ will first come at 14nm with lower core count.

 

[elbert]

No. The nonsensical 337W is my estimation of the TDP of hypothetical Starship CPU on 14nm. This nonsensical value combined with the other arguments given is the reason why I am rather sure that Starship is a 7nm CPU.

There is no leak or confirmation for "8, 12, and 16 core Zen+ on AM4+". In fact data suggests otherwise; the 48-core leak suggests that the 7nm Zen+ die for the "AM4+" will have 12-cores (i.e. two complexes of six-core each). Therefore AMD will probably produce 6-core and 12-core Zen+ on AM4+, just like is producing now 4-core and 8-core Zen on AM4.

Edit: My computation/explanation of why Starship has to be a 7nm chip wasn't needed, it was leaked it is 7nm

http://www.eteknix.com/amd-working-48-core-7nm-processor-codenamed-starship/

So I was correct in pointing out your nonsensical 337W wasn't Zen+.

No, the nonsensical 337W was for Zen+.

Now there has been likes of SP4R2 with drop in 4 and 8 core compatible plus 12 and 16 core additions in 2H 2017 leaks. One example and you can find many more.
http://www.fudzilla.com/news/processors/41164-amd-2017-opteron-comes-in-three-sockets

Fuad has to be taken with a grain of salt. He has some legit information but then he fills on the holes of that information with his own stuff, which most of time is nonsensical, because he doesn't understand tech. An example? He got the right the leak about MCM packages for the Opteron (multi-die packages), but then the adds his own (nonsensical) stuff about three-die Opterons, which he refers to as "three Zeppelin clusters", because he doesn't even know the correct term is "dies".

I think I have also identified the source of your confusion. When he talks about the 8, 12, and 16-core Opteron being socket compatible, you incorrectly believed that those are single-die and that is the reason why you insist on that AMD will launch 12-core and 16-core die Zen for enthusiasts, when the maximum core count for AM4 (even confirmed by AMD) is 8-core. Ok, let me clarify things a bit.

AMD is releasing three sockets for Zen: AM4, SP4, and SP3. Only AM4 is for customers (both mainstream and enthusiasts). The other two sockets are for servers (therein the "S" in the socket name).

AM4 is a single-die socket. The Zeppelin die is 8-core. AMD will release 8-core and 4-core Summit Ridge CPUs for AM4. With the 4-core CPU using a Zeppelin die with one-complex disabled.

SP4 is a dual-die socket (MCM2). AMD will release 16, 12, and 8-core Snowy Owl CPUs for SP4. The 16-core Opteron is made of two 8-core dies. The 8-core Opteron is made of two 4-core dies. Here relies your confusion. You believed this 8-core Opteron was single die. The 12-core Opteron is made of one 8-core die plus one 4-core die.

SP3 is a quad-die socket (MCM4). AMD will release 32, 24, and 16-core Naples CPUs for SP3. The 32-core Opteron is made of four 8-core dies. The 16-core Opteron is made of four 4-core dies. The 24-core Opteron is made of two 8-core dies plus two 4-core dies.

Unlike you needing no salt with no proof and only your word. I posted leaks which you side step the 3rd socket. There has been no leaks of a MCM4 Naples nor an MCM2 Snowy Owl. Ive ony seen leaks of Naples being an MCM.

AMD’s CEO Lisa Su confirmed that the company is working on several generations of CPUs to succeed Zen which are set to come out over a 3 to 5 year period. These future CPU microarchitectures were referred to by the CEO as “Zen+” cores.

 

[ComputerSecurityGuy]

Yeah, and frankly it's uneconomical to produce dies with over 8 cores for AMD at the moment. Even though a monolithic chip delivers higher performance it would have low yields and high costs.

 

[juanrga]

Yeah, and frankly it's uneconomical to produce dies with over 8 cores for AMD at the moment. Even though a monolithic chip delivers higher performance it would have low yields and high costs.

Not only a ~800mm² 32-core die would be prohibitive in terms of yields costs, but also AMD would have to release at least two dies more (including one for the AM4 platform) for the lower core chips, which would add the costs of the design of multiple dies, the validation of multiple dies, multiple masks costs,...

That is the reason why AMD is only making a single Zen die with 8-cores (Zeppelin).

 

[elbert]

Yeah, and frankly it's uneconomical to produce dies with over 8 cores for AMD at the moment. Even though a monolithic chip delivers higher performance it would have low yields and high costs.

Is it really monolithic? Leaks suggest a zen core size is only 4.9mm2incl L2. Even with 8 cores and a sizable shared L3 would suggest AMD has created many a larger chip. The old 6 core thuban totaled 346mm2. Hasewell-e is 356mm2 thus size of the 8 core may not be that large.
http://digiworthy.com/2016/08/30/amd-zen-die-size-details-on-quad-core-unit/

 

[juanrga]

You post no proof while I post leaks. Again Zen+ is ever evolving and AMD has stated there will be several revisions on the 14nm. IE Zen+ will first come at 14nm with lower core count.

Unlike you needing no salt with no proof and only your word. I posted leaks which you side step the 3rd socket. There has been no leaks of a MCM4 Naples nor an MCM2 Snowy Owl. Ive ony seen leaks of Naples being an MCM.

Those leaks are based in information I already have or information I predicted time ago before any leak. For instance about two years ago I predicted AMD would use quad-die package for the 32-core server CPU.

The information has been leaked and is now in the public domain. You can find many places where it is stated that both Naples and Snowy Owl are MCM packages. I will give two links

https://forums.anandtech.com/threads/first-summit-ridge-zen-benchmarks.2482739/page-30#post-38463505
http://www.fudzilla.com/news/processors/41088-16-zen-core-opteron-is-snowy-owl

Resume Zen CPUs:
Zeppelin die: 8-core Zen. One core-complex can be disabled in the die getting a 4-core die.
AM4 socket: single Zeppelin die; 4-core and 8-core Summit Ridge CPU.
SP4 socket: MCM2 (two Zeppelin dies); 8-core, 12-core and 16-core Snowy Owl CPU.
SP3 socket: MCM4 (four Zeppelin dies); 16-core, 24-core and 32-core Naples CPU.

AM4 for consumer (mainstream and enthusiast) and pro. SP3/SP4 for servers.

AMD’s CEO Lisa Su confirmed that the company is working on several generations of CPUs to succeed Zen which are set to come out over a 3 to 5 year period. These future CPU microarchitectures were referred to by the CEO as “Zen+” cores.

Exactly, they are temporarily named Zen+ and Zen++, with Zen+ being a 7nm product, and Zen++ doesn't still appearing in the roadmaps.

 

[-Fran-]

This year Digitimes published a report about both Intel and AMD delaying chips due to OEMs cleaning existences of older chips. Also desktop computers aren't phones. Refreshes cycles follow the trend

mobile > desktop > server

Funny you say that, because OEMs like short cycles for refreshes of products. What you say there, is a consequence of having too much inventory at a given period of time, not what they actually would like.

As a sells person, you want to keep inventory moving. OEMs deliver finalized products to clients, so they deal with a much complex situation than Intel or AMD for distribution and sells. New products faster, means you can create sells opportunities and so on.

And finally: "desktop computers aren't phones". Really? Is that just flame bait? It's really hard for you to put things in perspective when someone tries to make a point. OF COURSE THEY ARE NOT THE SAME!

Cheers!

 

[elbert]

You post no proof while I post leaks. Again Zen+ is ever evolving and AMD has stated there will be several revisions on the 14nm. IE Zen+ will first come at 14nm with lower core count.

Unlike you needing no salt with no proof and only your word. I posted leaks which you side step the 3rd socket. There has been no leaks of a MCM4 Naples nor an MCM2 Snowy Owl. Ive ony seen leaks of Naples being an MCM.

Those leaks are based in information I already have or information I predicted time ago before any leak. For instance about two years ago I predicted AMD would use quad-die package for the 32-core server CPU.

The information has been leaked and is now in the public domain. You can find many places where it is stated that both Naples and Snowy Owl are MCM packages. I will give two links

https://forums.anandtech.com/threads/first-summit-ridge-zen-benchmarks.2482739/page-30#post-38463505
http://www.fudzilla.com/news/processors/41088-16-zen-core-opteron-is-snowy-owl

Resume Zen CPUs:
Zeppelin die: 8-core Zen. One core-complex can be disabled in the die getting a 4-core die.
AM4 socket: single Zeppelin die; 4-core and 8-core Summit Ridge CPU.
SP4 socket: MCM2 (two Zeppelin dies); 8-core, 12-core and 16-core Snowy Owl CPU.
SP3 socket: MCM4 (four Zeppelin dies); 16-core, 24-core and 32-core Naples CPU.

AM4 for consumer (mainstream and enthusiast) and pro. SP3/SP4 for servers.

AMD’s CEO Lisa Su confirmed that the company is working on several generations of CPUs to succeed Zen which are set to come out over a 3 to 5 year period. These future CPU microarchitectures were referred to by the CEO as “Zen+” cores.

Exactly, they are temporarily named Zen+ and Zen++, with Zen+ being a 7nm product, and Zen++ doesn't still appearing in the roadmaps.

Only thing your one post is about is Snowy Owl being used in MCM for Naples. Your Zeppline dies are totally incorrect because zepplines are 4 cores packages. IE
AM4 socket: one or two Zeppelin dies; 4-core and 8-core Summit Ridge CPU.
SP4 socket: (two, three, and four Zeppelin dies); 8-core, 12-core and 16-core Snowy Owl CPU. Coming 2H 2017
SP3 socket: MCM (four, six, and eight Zeppelin dies); 16-core, 24-core and 32-core Naples CPU. With 2 sockets for 64 cores and 128 threads.
Now my point about the Zen+ CEO Lisa Su confirmed 3 years is is before 7nm hits production in 2020. Plus the fact she states several revisions of Zen at 14nm.

 

[Cazalan]

It's still just speculation. I've also heard the base die for the server Zen is 16c not 8c. So they would only need 2 die to get to the 32c config.

 

[juanrga]

Only thing your one post is about is Snowy Owl being used in MCM for Naples. Your Zeppline dies are totally incorrect because zepplines are 4 cores packages. IE
AM4 socket: one or two Zeppelin dies; 4-core and 8-core Summit Ridge CPU.
SP4 socket: (two, three, and four Zeppelin dies); 8-core, 12-core and 16-core Snowy Owl CPU. Coming 2H 2017
SP3 socket: MCM (four, six, and eight Zeppelin dies); 16-core, 24-core and 32-core Naples CPU. With 2 sockets for 64 cores and 128 threads.
Now my point about the Zen+ CEO Lisa Su confirmed 3 years is is before 7nm hits production in 2020. Plus the fact she states several revisions of Zen at 14nm.

Snowy Owl and Naples are two different server CPUs that use different sockets SP4 and SP3. And as mentioned before the sockets aren't pin compatible.

I also advised you that Fuad was posting wrong information and he is confounding "clusters", "complexes", and "dies". Fuad has reputation similar to WCCFTECH authors.

Zeppelin is the codename of the Zen die. You have below an annotated Zeppelin die shot, with the eight Zen cores, the GMI interconnects for the MCM configurations and the dual DDR4 controller

What Fuad and you call "4 cores packages" aren't packages as in MCM, but clusters of four-cores plus shared L3 that are the basic computation unit inside the Zeppelin die. AMD calls them the CPU complex or CCX

You can see in the annotated Zeppelin die the two complexes

Resume (once again)
AM4 socket: (one Zeppelin die); 4-core and 8-core Summit Ridge CPU.
SP4 socket: MCM2 (two Zeppelin dies); 8-core, 12-core and 16-core Snowy Owl CPU.
SP3 socket: MCM4 (four Zeppelin dies); 16-core, 24-core and 32-core Naples CPU.

There is not revision of Zen at 14nm. Zen+ is 7nm, and Zen++ would use what comes next (I guess it will be named 5nm).

 

[juanrga]

It's still just speculation. I've also heard the base die for the server Zen is 16c not 8c. So they would only need 2 die to get to the 32c config.

That was an early claim about 16-core server dies. Desdrenboy latter analyzed the diagram of the server APU and found that the 16-core part was in reality two Zeppelin dies glued together. Not to mention that the only known engineering samples of Zen are 4-core and 8-core dies. If a 16-core die existed it would have to be validated independently and we would know about it.

There is no 16-core base die for the server Zen. Even Fudzilla admits now that the 16-core Snowy Owl server CPU is a MCM package with two Zeppelin dies

http://www.fudzilla.com/news/processors/41088-16-zen-core-opteron-is-snowy-owl

 

[elbert]

Only thing your one post is about is Snowy Owl being used in MCM for Naples. Your Zeppline dies are totally incorrect because zepplines are 4 cores packages. IE
AM4 socket: one or two Zeppelin dies; 4-core and 8-core Summit Ridge CPU.
SP4 socket: (two, three, and four Zeppelin dies); 8-core, 12-core and 16-core Snowy Owl CPU. Coming 2H 2017
SP3 socket: MCM (four, six, and eight Zeppelin dies); 16-core, 24-core and 32-core Naples CPU. With 2 sockets for 64 cores and 128 threads.
Now my point about the Zen+ CEO Lisa Su confirmed 3 years is is before 7nm hits production in 2020. Plus the fact she states several revisions of Zen at 14nm.

Snowy Owl and Naples are two different server CPUs that use different sockets SP4 and SP3. And as mentioned before the sockets aren't pin compatible.

I also advised you that Fuad was posting wrong information and he is confounding "clusters", "complexes", and "dies". Fuad has reputation similar to WCCFTECH authors.

Zeppelin is the codename of the Zen die. You have below an annotated Zeppelin die shot, with the eight Zen cores, the GMI interconnects for the MCM configurations and the dual DDR4 controller

What Fuad and you call "4 cores packages" aren't packages as in MCM, but clusters of four-cores plus shared L3 that are the basic computation unit inside the Zeppelin die. AMD calls them the CPU complex or CCX

You can see in the annotated Zeppelin die the two complexes

Resume (once again)
AM4 socket: (one Zeppelin die); 4-core and 8-core Summit Ridge CPU.
SP4 socket: MCM2 (two Zeppelin dies); 8-core, 12-core and 16-core Snowy Owl CPU.
SP3 socket: MCM4 (four Zeppelin dies); 16-core, 24-core and 32-core Naples CPU.

There is not revision of Zen at 14nm. Zen+ is 7nm, and Zen++ would use what comes next (I guess it will be named 5nm).

I already know 4 core packages had nothing to do with MCM as that is a Zepplin package. IE one Zeppline is a 4 core CPU and two zepplines is 8 core Zen. Your pics all have Zepplin with core 0, 1, 2 , and 3 which is what it is and it takes 2 to make an 8 core. Zepplin is a cluster with each core having its own L1 and L2 cache but all 4 cores share the L3 larger cache. A single silcon can have multiple Zepplin clusters within the physical limits of the process node. MCM is used to splice 2 seperate silicons together and has little to do with Zepplin. IE your Zepplin die count is off.
Snowy Owl and Naples both are not servers. Snowy Owl is a single socket workstation CPU like broadwell-e. Naples is a 2 and 4 socket server CPU.

 

[jaymc]

Looks to me like your missing the pint Elbert (and about four cores)..... the cores 0, 1, ,2 and 3 on the left are repeated on the right of the annotation...

gmi link #0 is for core complex #0 on the left side i presume and
gmi link #1 is for core complex #1 on the right hand side of the annotation...

and a four core cpu is actually an 8 core with one of the complexes disabled !!!

is that acurate juanrga...?

regards,
jay

 

[elbert]

GMI link is an interconnect between complex be they zeppelin or polaris gpu clusters. GMI link is a 100GB wide low latency connection that not only connects complex's but also handles memory coherance and PCI-E among other things.

Now Jay you just pointed out how two zeppelin core complex are connected by GMI link. Thus zeppelin 0 and zeppelin 1 are two total for an 8 core zen. I have yet to see leaks on disabled Zeppelin but in theory you may be correct that a 4 core may be 2 Zeppelin's with one disabled.

There is the case where your totally wrong where complex #1 is a polaris GPU cluster of a quad APU. If the GPU cluster is disabled your left with only 1 zeppelin either way.

Do note that an MCM requires 4 GMI data fibers to hit 100GB's with a much worse latency compared to on the die data fibers.

 

[jaymc]

Well I suppose your right Elbert... I would of been inclined to agree with Juan but hey I've been wrong before.. An I'm pretty sure it will happen again 🙂

I'm aware that they will be swapping out four cores for a GPU that's not for a while though I believe.

I always taught they would be shipping the four core with 8 on the die (one complex disabled) as I recall in the past AMD doing this type of thing before....

I suppose there would be no way for us to enable the other complex if that was the case ? ? ? ?

EDIT the other complex does look identical supose it could be a polaris GPU complex but doubtfull... those are a fair bit off yet or are they ? would they be floating around already ??

Jay

 

[elbert]

Well I suppose your right Elbert... I would of been inclined to agree with Juan but hey I've been wrong before.. An I'm pretty sure it will happen again 🙂

I'm aware that they will be swapping out four cores for a GPU that's not for a while though I believe.

I always taught they would be shipping the four core with 8 on the die (one complex disabled) as I recall in the past AMD doing this type of thing before....

I suppose there would be no way for us to enable the other complex if that was the case ? ? ? ?

EDIT the other complex does look identical supose it could be a polaris GPU complex but doubtfull... those are a fair bit off yet or are they ? would they be floating around already ??

Jay

Na the APU's are set to launch with Zen in Feb but that is a bit away and could be delayed again. Sure they have disabled cores but also GPU's so could be both. Im sure if they can salvage a quad of either it will be done.

 

[elbert]

AMD and GOFLO can catch a break even at skipping a node. TSMC is taking contracts for 7nm early next year with volume production by 2018. This puts GOFLO's 7nm 2 years behind. http://www.digitaltrends.com/computing/tsmc-7nm-2017/

I think AMD should try breaking their contract and let GOFLO float their own ship. Its clearly GOFLO is costing them as Zen could have been out on TSMC's 10nm by now.

 

[elbert]

In info on AM4 motherboards suggest some will not OC or be limited OC. Also some motherboards may have 2x16 Lanes PCI-E Plus adding additional lanes tho a PLX chip.

https://www.planet3dnow.de/cms/26568-amds-am4-infrastruktur-x370-beerbt-990fx/

 

[-Fran-]

I have to say... That slide looks fake... Maybe the naming is correct (just maybe), but I can't read German to validate any of the claims they make about the slide and information.

Cheers!

 

[jaymc]

Can they break their contract with glofo ??

I read that they renegotiated their WSA recently so they could use other suppliers.... but doesn't this come at a price (finacial penelty), also is it not only possible if glofo is not able to supply/fill their order, in other words only if glofo cannot meet the demand ?

What would be the repercussions of AMD going to TSMC for instance...?

It seems like Globalfoundries will be the downfall of AMD..

 

[elbert]

I have to say... That slide looks fake... Maybe the naming is correct (just maybe), but I can't read German to validate any of the claims they make about the slide and information.

Cheers!

Just copy and past into google translater like it did. First paragraph or 2 tell the story.

 

[elbert]

Can they break their contract with glofo ??

I read that they renegotiated their WSA recently so they could use other suppliers.... but doesn't this come at a price (finacial penelty), also is it not only possible if glofo is not able to supply/fill their order, in other words only if glofo cannot meet the demand ?

What would be the repercussions of AMD going to TSMC for instance...?

It seems like Globalfoundries will be the downfall of AMD..

They could buy it out some way or sue if they could prove GOFLO wasn' t living upto the deal in some way. With going to TSMC it would cost them more to stay on the cutting edge but they stand a better chance of making higher profits off products going years earlier.

 

[jaymc]

Well I don't know why they didn't do that years ago...

All I seem to recall with AMD and Glofo is delays and problems with supply in the past. It's a dam shame they never managed to get away from them.

Would they need to redesign the die for true 10nm with TSMC ??

Apple may ditch intel in favour of new Zen APU....!!
https://www.kitguru.net/lifestyle/apple/matthew-wilson/apple-may-ditch-intel-in-favour-of-amds-zen-cpus-for-future-macbooks/

What do yis make of this over on seekingalpha he works out performance of Zen..
"Zen core would be competitive with things like the i7 2600K, a 2nd generation i7 running at 3.4Ghz base. On single thread performance, this would be below even an i3 4330, a 4th generation i3 running at 3.5Ghz."
http://seekingalpha.com/article/4008322-amd-another-performance-shoe-drops

 

[Cazalan]

They just paid additional funds/penalties to GF so they can use Samsung or TSMC more than before.

 

[elbert]

Well I don't know why they didn't do that years ago...

All I seem to recall with AMD and Glofo is delays and problems with supply in the past. It's a dam shame they never managed to get away from them.

Would they need to redesign the die for true 10nm with TSMC ??

Apple may ditch intel in favour of new Zen APU....!!
https://www.kitguru.net/lifestyle/apple/matthew-wilson/apple-may-ditch-intel-in-favour-of-amds-zen-cpus-for-future-macbooks/

What do yis make of this over on seekingalpha he works out performance of Zen..
"Zen core would be competitive with things like the i7 2600K, a 2nd generation i7 running at 3.4Ghz base. On single thread performance, this would be below even an i3 4330, a 4th generation i3 running at 3.5Ghz."
http://seekingalpha.com/article/4008322-amd-another-performance-shoe-drops

Yup I agree its a shame that GOFLO has such a hold on AMD.

On that compare its not the old days of single core performance means everything. Zen and Kabylake requires windows 10 thus threads matter more so today than ever before. Now he speculates that Zen would be 4 fps behind the fastest single core performer 4000 series. I tell you thats not bad in any way because Intel really hasn't done much since on a per core performance. Skylake only sees about a 5% bonus over Hasewell per clock and broadwell even a bit less. What this says is no Zen will not beat the i7 6900 but sure will be in the running. Without question 8 core Zen will beat all the 6 core Broadwell-e offers which puts AMD a mountain ahead of their old stuff in performance and profitable future.
Now there is also optimization at play which will benefit Zen more than Intel. Its a completely redone CPU which most software companys will work to improve code only focused on Intels CPU's at the moment. Today we see the old Intel 6 and 8 cores slapping down the fasted quads in games. I dont agree this would force Zen down to competing against quads but possible 6 cores at times. I think Zen 8 core can sale in the 500 to $600 range given a $100 motherboard and give Intel a major beat down.