Discussion: AMD Ryzen

[jdwii]

Spoiler

http://wccftech.com/amd-ryzen-am4-processor-family-leak-r7-1800x-flagship/

"AMD Ryzen Processor Lineup Leaks Out, R7 1800X 4 GHz Flagship CPU Detailed – Up To 17 8 Core, 6 Core, 4 Core Models, 2nd March Launch"

This was posted on reddit earlier. The table of frequencies is from some no name chinese site, and is entirely speculation.

Note that they could not even get the minimum frequency stated by AMD correct with all those processors stating a low base clock of 3 GHz, when the ES out now are already minimum 3.3-3.4.

Additionally, HBM will most certainly not come on a desktop APU. That was not in the chinese speculation, and most certainly will not come to pass unless you want to spend flagship 8C ryzen money for a 4C APU. AMD will not do that.

Also, the naming scheme for the processors is not like anything I have heard. SR7 1800X? I cannot possible imagine a more random name for these processors...

Have to agree with ya that would be terrible naming. 🙁 Sadly i think R3-R5-R7 thing will stick)...... i think

 

[sarinaide]

R2D2

I saw the 88 means 8 cores and 8 threads, i assume 61 meand 6 cores only which is why there is a 10% difference to the 6800K as it has no threading.

 

[juanrga]

http://wccftech.com/amd-ryzen-am4-processor-family-leak-r7-1800x-flagship/

"AMD Ryzen Processor Lineup Leaks Out, R7 1800X 4 GHz Flagship CPU Detailed – Up To 17 8 Core, 6 Core, 4 Core Models, 2nd March Launch"

The original table for their article

 

[sarinaide]

That is the hardest naming scheme ever

 

[Ziga Stupar]

http://wccftech.com/amd-ryzen-am4-processor-family-leak-r7-1800x-flagship/

"AMD Ryzen Processor Lineup Leaks Out, R7 1800X 4 GHz Flagship CPU Detailed – Up To 17 8 Core, 6 Core, 4 Core Models, 2nd March Launch"

The original table for their article

looks too many too choose from i belive we will have fewer CPUs too choose from plus from rumors SR7 will be first too be avaible too buy

 

[Ziga Stupar]

Guys this Extended Frequency Range (XFR) function i think is not like permenent overclock becouse it only rises boost frequencies not base frequencies so it will be overclock on demand not 24/7 overclock, but i think motherboards will have auto overclock function. And limit of this XFR is CPU cooling,PSU and your system

 

[sarinaide]

Ryzen has pretty good performance at stock relative to Intel in AOTS

i7 6950X - Titan X = 77.7

Spoiler

i7 6800K - 1080 = 67.7

Spoiler

i7 5930K - 1080 = 62.3

Spoiler

i7 4970 - 1080 = 61.8

Spoiler

i5 6400 - 970 = 41.3 (this was more to show how clockspeed is major in AOTS)

Spoiler

i5 6500 - 970 = 61.3 (following on the 6400, the 6500 has 500Mhz clock bumps and the result is 38% higher scores)

Spoiler

i7 6700K - 1080 = 82.6 (I posted this one as I believe this is more a true 4Ghz score representation)

Spoiler

1) AOTS likes clock speed

2) AOTS doesn't scale beyond 4 threads all that well.

3) Ryzen painted with the same brush shows promising performance which does point to strong CPU performance.

 

[ex_bubblehead]

A reminder to all, please post in english only.

 

[sarinaide]

A reminder to all, please post in english only.

are you refering to the german and chinese slides?

 

[ex_bubblehead]

A reminder to all, please post in english only.

are you refering to the german and chinese slides?

As long as there are english subtitles and descriptions they're fine. I'm referring more general posting (I've removed the offenders) and linking to non english language sites. This version of Tom's Hardware is intended for our English speaking members.

 

[Ziga Stupar]

ok rough translation in english is saying: Hello,Intel starts freaking out about Ryzen, and urgently sampling new CPUs. You will have more on Monday (sample are on the way.

So basicaly Intel is afraid of Ryzen thus it means Ryzen will deliver

 

[Danra]

Everyone knows that we will have to wait until actual consumer CPUs are in the hands of reputable reviewers before we will know the truth about everything Ryzen displayed in benchmarks.

It is my sincere hope that AMD will have a winner on their hands, including very good gaming performance for at least mainstream consumers.

 

[sarinaide]

And that is exactly the data they used as starting point. 8C Zen on pair with 8C Broadwell: ~107% vs 115%.

But we were comparing 6C Zen vs 4C Kabylake here.

The problem, which apparently everyone is ignoring, is on the clocks. Everyone, including myself was expecting the 4C Zen to have higher clocks than the 8C Zen. I expected about 13% higher clocks for the 65W 4C. But all the information and leaks claim that the 8C Zen has the higher clocks of the whole Zen family.

Even if Zen has an average throughput-per-clock (IPC+SMT) close to Broadwell, the 6C Zen has nearly 30% lower clocks than Kabylake.

Now the question is why those lower clocks for the 6C and the 4C Zen. I advanced two possible explanations: 14LPP and CCX. I will further extend.

[[ 14LPP ]]
Despite people believing the contrary, 14LPP is a Low Power node. It is not 14HP. I expected about 3.0/3.5GHz clocks for the 95W 8C Zen. It seems fully confirmed there exists a 3.4/3.8GHz PC/PR chip (F4 steeping). This is 11% higher clocks than I expected.

There is a 3.6/4.0GHz PC/PR chip (also F4 steeping) but according to CPCHardware this is not a 95W chip. CPCHardware didn't give us the exact TDP, but if data available is accurate we can try to estimate the TDP for that top SKU

95W * (3.6/3.4)^2 = 106W
95W * (3.6/3.4)^3 = 113W

Let us assume it is a 110W chip, which agrees with CPCHardware claim the TDP is "above 100W". Ok.

By silicon laws, and even common sense, the 4C Zen would have higher clocks. I expected 3.4GHz (but my baseline was my former estimation of 3.0GHz for the 95W 8C). Using the new 3.4GHz 95W 8C chip as baseline, we obtain for the 65W 4C Zen

3.4GHz * ROOT2 [ 2* (65/95) ] = 4.0GHz
3.4GHz * ROOT3 [ 2* (65/95) ] = 3.8GHz

Let us take 3.9GHz as base clock for a 65W 4C Zen on F4. However, the 4C Zen is rumored by everyone to come with much lower clocks. A possible explanation is that AMD is selecting the 8C chips (a la FX-9000 series) to get the higher possible clocks, leaving the normal silicon (the one cannot clock so high) for the rest of (cheaper) chips.

This is a possible explanation for the discrepancy between my predictions for clocks and reported clocks. It is like if I had predicted the clocks for the FX-8350 (average silicon) but AMD had started launching a FX-9590 (golden silicon). This analogy is not completely accurate, of course, because one is a 125W chip and the other is 220W, but you get the point.

If this explanation is correct, it says us why the 6C Zen has lower clocks. A 95W 6C Zen would have clocks ~4GHz. This would be the common sense approach. This is what Intel does, with its 140W 6C Broadwell achieving higher clocks than its 140W 8C Broadwell. Indeed taking the 3.2GHz base for the 8C Broadwell we obtain for a 6C Broadwell

3.2GHz * ROOT2 [ 8/6 ] = 3.7GHz
3.2GHz * ROOT3 [ 8/6 ] = 3.5GHz

And, unsurprisingly, the i7-6850K has a base clock of 3.6GHz.

However, if the 8C Zen chips are already in the upper limit of the 14LPP silicon, then a 95W 6C Zen couldn't achieve ~4GHz clocks. Only option left for AMD would be to reduce the TDP to 65W and ship it with lower clocks: 3.3GHz.

The 8C Zen must be close to the 8C Broadwell, because clocks are close, but the 6C Zen is being "destroyed" by a higher-clocked 4C Kabylake on heavily multithreaded benches. Ouch!

[[ CCX ]]
Another possible explanation for the lower clocks is the weird CCX approach. It is weird because one doesn't waste time designing a modular approach just to then ignore the modules and treat each core independently. We don't know the fine details of the CCX, but we know that performance varies depending of the topology. Not all 4C Zen are the same, the 4+0 chips perform differently than the 2+2 chips and the 3+1 chips.

Maybe this weird combination of modules plus individual core treatment is the origin for the lower clocks on lower core models. Maybe to avoid the unbalances generated by different active core topologies (4+0 is not the same than 2+2 evidently) it is needed to synchronize the pair of CCX in a module in a special way, just to make believe the OS that all 4C chips are the same. If this special synchronization exists it could add extra latency (from CCXtoCCX communication) and hurt clocks. Recall that f_max is a function of the length of the critical datapath.

This could explain why only the chips with full modules achieve the higher clocks, whereas the chips with less than 8C have clocks problems.

Time will say...

What are you even talking about here, you lost me on talking about modules when we already know a Zen is not a module design.

It is so scary how little the active world knows about Zen, AMD likes it because it has clearly caused distress among Intel and it's faithful, trying illogically cling to "40%" or "2x Excavator" like AMD would be content with that if they could achieve 3-4X the performance.

A 6C/6T Ryzen with low clocks inside 10% of a 6800K with 12 thread is quite impressive actually, it shows how innefficient Hyperthreading is and maybe that is the reason for the second part, Intel needs clockspeed to mask inability to push IPC which has been stagnant since Haswell.

I agree with your sentiment on CPC's tweet on Intel being flustered, they are legitimately concerned and I think they already know that this could be Hammer all over again, and the way they tried to hush the Radeon deal was quaint in Intel style. Intel's Iris works but at a rediculous cost that OEMs are just running off to get Mobile GPU's rather for the same price and 2-3 times the performance at entry level, their iGPU's are rediculously big, Vega is small so dump a Vega on your die to open more space fore more compute units to try push IPC up. This makes sense, but the irony is AMD would milk royalties in the billions and with AMD being a very low operation cost company now, these millions are just making them stronger, eventually the GloFo deal will look like the cheapest steal in history with GF taking a very minicule cut because they wanted a top end heavy deal upfront which AMD paid out debt upfront which may be another one of Lisa Su's masterstrokes.

 

[cdrkf]

And that is exactly the data they used as starting point. 8C Zen on pair with 8C Broadwell: ~107% vs 115%.

But we were comparing 6C Zen vs 4C Kabylake here.

The problem, which apparently everyone is ignoring, is on the clocks. Everyone, including myself was expecting the 4C Zen to have higher clocks than the 8C Zen. I expected about 13% higher clocks for the 65W 4C. But all the information and leaks claim that the 8C Zen has the higher clocks of the whole Zen family.

Even if Zen has an average throughput-per-clock (IPC+SMT) close to Broadwell, the 6C Zen has nearly 30% lower clocks than Kabylake.

Now the question is why those lower clocks for the 6C and the 4C Zen. I advanced two possible explanations: 14LPP and CCX. I will further extend.

[[ 14LPP ]]
Despite people believing the contrary, 14LPP is a Low Power node. It is not 14HP. I expected about 3.0/3.5GHz clocks for the 95W 8C Zen. It seems fully confirmed there exists a 3.4/3.8GHz PC/PR chip (F4 steeping). This is 11% higher clocks than I expected.

There is a 3.6/4.0GHz PC/PR chip (also F4 steeping) but according to CPCHardware this is not a 95W chip. CPCHardware didn't give us the exact TDP, but if data available is accurate we can try to estimate the TDP for that top SKU

95W * (3.6/3.4)^2 = 106W
95W * (3.6/3.4)^3 = 113W

Let us assume it is a 110W chip, which agrees with CPCHardware claim the TDP is "above 100W". Ok.

By silicon laws, and even common sense, the 4C Zen would have higher clocks. I expected 3.4GHz (but my baseline was my former estimation of 3.0GHz for the 95W 8C). Using the new 3.4GHz 95W 8C chip as baseline, we obtain for the 65W 4C Zen

3.4GHz * ROOT2 [ 2* (65/95) ] = 4.0GHz
3.4GHz * ROOT3 [ 2* (65/95) ] = 3.8GHz

Let us take 3.9GHz as base clock for a 65W 4C Zen on F4. However, the 4C Zen is rumored by everyone to come with much lower clocks. A possible explanation is that AMD is selecting the 8C chips (a la FX-9000 series) to get the higher possible clocks, leaving the normal silicon (the one cannot clock so high) for the rest of (cheaper) chips.

This is a possible explanation for the discrepancy between my predictions for clocks and reported clocks. It is like if I had predicted the clocks for the FX-8350 (average silicon) but AMD had started launching a FX-9590 (golden silicon). This analogy is not completely accurate, of course, because one is a 125W chip and the other is 220W, but you get the point.

If this explanation is correct, it says us why the 6C Zen has lower clocks. A 95W 6C Zen would have clocks ~4GHz. This would be the common sense approach. This is what Intel does, with its 140W 6C Broadwell achieving higher clocks than its 140W 8C Broadwell. Indeed taking the 3.2GHz base for the 8C Broadwell we obtain for a 6C Broadwell

3.2GHz * ROOT2 [ 8/6 ] = 3.7GHz
3.2GHz * ROOT3 [ 8/6 ] = 3.5GHz

And, unsurprisingly, the i7-6850K has a base clock of 3.6GHz.

However, if the 8C Zen chips are already in the upper limit of the 14LPP silicon, then a 95W 6C Zen couldn't achieve ~4GHz clocks. Only option left for AMD would be to reduce the TDP to 65W and ship it with lower clocks: 3.3GHz.

The 8C Zen must be close to the 8C Broadwell, because clocks are close, but the 6C Zen is being "destroyed" by a higher-clocked 4C Kabylake on heavily multithreaded benches. Ouch!

[[ CCX ]]
Another possible explanation for the lower clocks is the weird CCX approach. It is weird because one doesn't waste time designing a modular approach just to then ignore the modules and treat each core independently. We don't know the fine details of the CCX, but we know that performance varies depending of the topology. Not all 4C Zen are the same, the 4+0 chips perform differently than the 2+2 chips and the 3+1 chips.

Maybe this weird combination of modules plus individual core treatment is the origin for the lower clocks on lower core models. Maybe to avoid the unbalances generated by different active core topologies (4+0 is not the same than 2+2 evidently) it is needed to synchronize the pair of CCX in a module in a special way, just to make believe the OS that all 4C chips are the same. If this special synchronization exists it could add extra latency (from CCXtoCCX communication) and hurt clocks. Recall that f_max is a function of the length of the critical datapath.

This could explain why only the chips with full modules achieve the higher clocks, whereas the chips with less than 8C have clocks problems.

Time will say...

What are you even talking about here, you lost me on talking about modules when we already know a Zen is not a module design.

It is so scary how little the active world knows about Zen, AMD likes it because it has clearly caused distress among Intel and it's faithful, trying illogically cling to "40%" or "2x Excavator" like AMD would be content with that if they could achieve 3-4X the performance.

A 6C/6T Ryzen with low clocks inside 10% of a 6800K with 12 thread is quite impressive actually, it shows how innefficient Hyperthreading is and maybe that is the reason for the second part, Intel needs clockspeed to mask inability to push IPC which has been stagnant since Haswell.

I agree with your sentiment on CPC's tweet on Intel being flustered, they are legitimately concerned and I think they already know that this could be Hammer all over again, and the way they tried to hush the Radeon deal was quaint in Intel style. Intel's Iris works but at a rediculous cost that OEMs are just running off to get Mobile GPU's rather for the same price and 2-3 times the performance at entry level, their iGPU's are rediculously big, Vega is small so dump a Vega on your die to open more space fore more compute units to try push IPC up. This makes sense, but the irony is AMD would milk royalties in the billions and with AMD being a very low operation cost company now, these millions are just making them stronger, eventually the GloFo deal will look like the cheapest steal in history with GF taking a very minicule cut because they wanted a top end heavy deal upfront which AMD paid out debt upfront which may be another one of Lisa Su's masterstrokes.

Zen isn't build using modules in the way the constructions cores were- however we do know (based on info from AMD themselves) that Zen is built in 4 core blocks, in a similar way to the Jaguar 4 core cpu's used in the consoles (being 2 x 4c blocks rather than a monolithic 8 core). That does mean that there is some inter chip communication required between the two blocks. The concept of a theoretical 4 core being produced from a defective 8 core die could result in less than optimal performance is you wind up with the cores split between the two groups of 4. I must admit I was expecting AMD to release Zen with a separate 8 and 4 core die- which would remove this as a potential issue, although perhaps they aren't bothering as they will get a quad core Zen die out with the APU later in the year (and then can always produce another 'Athlon x4' without the gpu if they want to).

That said, I'm not convinced that a 4C kaby will 'destroy' a 6C zen in well threaded apps, that doesn't seem to add up, however as a gaming chip I can see it being sub optimal for *most* games.

 

[sarinaide]

And that is exactly the data they used as starting point. 8C Zen on pair with 8C Broadwell: ~107% vs 115%.

But we were comparing 6C Zen vs 4C Kabylake here.

The problem, which apparently everyone is ignoring, is on the clocks. Everyone, including myself was expecting the 4C Zen to have higher clocks than the 8C Zen. I expected about 13% higher clocks for the 65W 4C. But all the information and leaks claim that the 8C Zen has the higher clocks of the whole Zen family.

Even if Zen has an average throughput-per-clock (IPC+SMT) close to Broadwell, the 6C Zen has nearly 30% lower clocks than Kabylake.

Now the question is why those lower clocks for the 6C and the 4C Zen. I advanced two possible explanations: 14LPP and CCX. I will further extend.

[[ 14LPP ]]
Despite people believing the contrary, 14LPP is a Low Power node. It is not 14HP. I expected about 3.0/3.5GHz clocks for the 95W 8C Zen. It seems fully confirmed there exists a 3.4/3.8GHz PC/PR chip (F4 steeping). This is 11% higher clocks than I expected.

There is a 3.6/4.0GHz PC/PR chip (also F4 steeping) but according to CPCHardware this is not a 95W chip. CPCHardware didn't give us the exact TDP, but if data available is accurate we can try to estimate the TDP for that top SKU

95W * (3.6/3.4)^2 = 106W
95W * (3.6/3.4)^3 = 113W

Let us assume it is a 110W chip, which agrees with CPCHardware claim the TDP is "above 100W". Ok.

By silicon laws, and even common sense, the 4C Zen would have higher clocks. I expected 3.4GHz (but my baseline was my former estimation of 3.0GHz for the 95W 8C). Using the new 3.4GHz 95W 8C chip as baseline, we obtain for the 65W 4C Zen

3.4GHz * ROOT2 [ 2* (65/95) ] = 4.0GHz
3.4GHz * ROOT3 [ 2* (65/95) ] = 3.8GHz

Let us take 3.9GHz as base clock for a 65W 4C Zen on F4. However, the 4C Zen is rumored by everyone to come with much lower clocks. A possible explanation is that AMD is selecting the 8C chips (a la FX-9000 series) to get the higher possible clocks, leaving the normal silicon (the one cannot clock so high) for the rest of (cheaper) chips.

This is a possible explanation for the discrepancy between my predictions for clocks and reported clocks. It is like if I had predicted the clocks for the FX-8350 (average silicon) but AMD had started launching a FX-9590 (golden silicon). This analogy is not completely accurate, of course, because one is a 125W chip and the other is 220W, but you get the point.

If this explanation is correct, it says us why the 6C Zen has lower clocks. A 95W 6C Zen would have clocks ~4GHz. This would be the common sense approach. This is what Intel does, with its 140W 6C Broadwell achieving higher clocks than its 140W 8C Broadwell. Indeed taking the 3.2GHz base for the 8C Broadwell we obtain for a 6C Broadwell

3.2GHz * ROOT2 [ 8/6 ] = 3.7GHz
3.2GHz * ROOT3 [ 8/6 ] = 3.5GHz

And, unsurprisingly, the i7-6850K has a base clock of 3.6GHz.

However, if the 8C Zen chips are already in the upper limit of the 14LPP silicon, then a 95W 6C Zen couldn't achieve ~4GHz clocks. Only option left for AMD would be to reduce the TDP to 65W and ship it with lower clocks: 3.3GHz.

The 8C Zen must be close to the 8C Broadwell, because clocks are close, but the 6C Zen is being "destroyed" by a higher-clocked 4C Kabylake on heavily multithreaded benches. Ouch!

[[ CCX ]]
Another possible explanation for the lower clocks is the weird CCX approach. It is weird because one doesn't waste time designing a modular approach just to then ignore the modules and treat each core independently. We don't know the fine details of the CCX, but we know that performance varies depending of the topology. Not all 4C Zen are the same, the 4+0 chips perform differently than the 2+2 chips and the 3+1 chips.

Maybe this weird combination of modules plus individual core treatment is the origin for the lower clocks on lower core models. Maybe to avoid the unbalances generated by different active core topologies (4+0 is not the same than 2+2 evidently) it is needed to synchronize the pair of CCX in a module in a special way, just to make believe the OS that all 4C chips are the same. If this special synchronization exists it could add extra latency (from CCXtoCCX communication) and hurt clocks. Recall that f_max is a function of the length of the critical datapath.

This could explain why only the chips with full modules achieve the higher clocks, whereas the chips with less than 8C have clocks problems.

Time will say...

What are you even talking about here, you lost me on talking about modules when we already know a Zen is not a module design.

It is so scary how little the active world knows about Zen, AMD likes it because it has clearly caused distress among Intel and it's faithful, trying illogically cling to "40%" or "2x Excavator" like AMD would be content with that if they could achieve 3-4X the performance.

A 6C/6T Ryzen with low clocks inside 10% of a 6800K with 12 thread is quite impressive actually, it shows how innefficient Hyperthreading is and maybe that is the reason for the second part, Intel needs clockspeed to mask inability to push IPC which has been stagnant since Haswell.

I agree with your sentiment on CPC's tweet on Intel being flustered, they are legitimately concerned and I think they already know that this could be Hammer all over again, and the way they tried to hush the Radeon deal was quaint in Intel style. Intel's Iris works but at a rediculous cost that OEMs are just running off to get Mobile GPU's rather for the same price and 2-3 times the performance at entry level, their iGPU's are rediculously big, Vega is small so dump a Vega on your die to open more space fore more compute units to try push IPC up. This makes sense, but the irony is AMD would milk royalties in the billions and with AMD being a very low operation cost company now, these millions are just making them stronger, eventually the GloFo deal will look like the cheapest steal in history with GF taking a very minicule cut because they wanted a top end heavy deal upfront which AMD paid out debt upfront which may be another one of Lisa Su's masterstrokes.

Zen isn't build using modules in the way the constructions cores were- however we do know (based on info from AMD themselves) that Zen is built in 4 core blocks, in a similar way to the Jaguar 4 core cpu's used in the consoles (being 2 x 4c blocks rather than a monolithic 8 core). That does mean that there is some inter chip communication required between the two blocks. The concept of a theoretical 4 core being produced from a defective 8 core die could result in less than optimal performance is you wind up with the cores split between the two groups of 4. I must admit I was expecting AMD to release Zen with a separate 8 and 4 core die- which would remove this as a potential issue, although perhaps they aren't bothering as they will get a quad core Zen die out with the APU later in the year (and then can always produce another 'Athlon x4' without the gpu if they want to).

That said, I'm not convinced that a 4C kaby will 'destroy' a 6C zen in well threaded apps, that doesn't seem to add up, however as a gaming chip I can see it being sub optimal for *most* games.

I saw what he meant, he was talking about Zeppelin dies.

I believe by the code 61 instead of 66 it implies that AMD are actually using a pure hexcore. That more than makes sense for 10% slower performance and why a 4.5+ Ghz i7 with 8 threads may be faster.

 

[sarinaide]

http://

This is the next faked internet post

 

[juanrga]

What are you even talking about here, you lost me on talking about modules when we already know a Zen is not a module design.

CCX = CMP module != CMT module

A 6C/6T Ryzen

It was a 6C/12T Ryzen.

 

[juanrga]

That said, I'm not convinced that a 4C kaby will 'destroy' a 6C zen in well threaded apps, that doesn't seem to add up, however as a gaming chip I can see it being sub optimal for *most* games.

Will not destroy but on pair

 

[jdwii]

A reminder to all, please post in english only.

are you refering to the german and chinese slides?

As long as there are english subtitles and descriptions they're fine. I'm referring more general posting (I've removed the offenders) and linking to non english language sites. This version of Tom's Hardware is intended for our English speaking members.

Are charts ok? Cause most of the time leaks don't come from English based locations

 

[ex_bubblehead]

A reminder to all, please post in english only.

are you refering to the german and chinese slides?

As long as there are english subtitles and descriptions they're fine. I'm referring more general posting (I've removed the offenders) and linking to non english language sites. This version of Tom's Hardware is intended for our English speaking members.

Are charts ok? Cause most of the time leaks don't come from English based locations

Provide translations as necessary and they're fine.

 

[8350rocks]

http://

This is the next faked internet post

That was a horrendously bad fake...quad channel memory is a dead give away...

 

[sarinaide]

What are you even talking about here, you lost me on talking about modules when we already know a Zen is not a module design.

CCX = CMP module != CMT module

A 6C/6T Ryzen

It was a 6C/12T Ryzen.

if you read the hash string the 8/16 is 88, the 4/8 is 4/4 while the 6 was followed by 1, meaning that AMD can recycle the defective 8 core silicon and disable the SMT while making a well priced 6C/6T variant. CPC have not confirmed the hex core design but it makes sense for it to be recycled octocores with disabled SMT as it will not cost AMD anything

6800K - 90%
6C Ryzen - 85%

Think that is very good.

 

[juanrga]

What are you even talking about here, you lost me on talking about modules when we already know a Zen is not a module design.

CCX = CMP module != CMT module

A 6C/6T Ryzen

It was a 6C/12T Ryzen.

if you read the hash string the 8/16 is 88, the 4/8 is 4/4 while the 6 was followed by 1, meaning that AMD can recycle the defective 8 core silicon and disable the SMT while making a well priced 6C/6T variant. CPC have not confirmed the hex core design but it makes sense for it to be recycled octocores with disabled SMT as it will not cost AMD anything

The ID string sequence is 6I not 61. Moreover, CPC confirmed it is 12 threads...

 

[jimmysmitty]

http://wccftech.com/amd-ryzen-am4-processor-family-leak-r7-1800x-flagship/

"AMD Ryzen Processor Lineup Leaks Out, R7 1800X 4 GHz Flagship CPU Detailed – Up To 17 8 Core, 6 Core, 4 Core Models, 2nd March Launch"

The original table for their article

I wonder if I pair this up with my old ATI X1800XT if it will go faster....

I am not a fan of the naming scheme if that is it. It is just off. Maybe I will get used to it.

 

[sarinaide]

Intel will be using custom AMD graphics cores on its CPU's. I knew it. This is going to be very expensive plus royalties per part is going to be a massive money spinner for AMD.