goldstone77 :
jimmysmitty :
For all we know they could have a viable working 7nm process they are going to ramp up quickly after they push their 10nm out the door.
Jimmy, correct me if I'm wrong, but it doesn't appear that you understand the lithography process, and the limitations of current tooling. It's impossible to accurately make the features for what Intel is calling 7nm at this time. So, for all we know, they absolutely do not have a viable 7nm working. And without EUV it's a extremely hard task to make a single 10nm chip at 100.76 MTr/mm² without it being riddled with defects. The tools just are not capable of measuring that small accurately. So, I'll go back to what I originally been trying to say, Intel has been lying about 10nm for a very very long time!
Edit: Just to add to the tooling, the new tools are expected in 2021, and they are 2 stories tall! It is going to be a monumental feat into even integrate those tools to a clean room environment.
2nd Edit:https://twitter.com/lasserith/status/1042750214757646336
https://thechipcollective.com/posts/moshedolejsi/what-is-up-with-euv/
Again not going to argue. We don't know what Intel has or don't have.
Also, they have been working on FAB42 quite a bit recently, it is currently being retooled for 7nm, and they have multiple large cranes. I could take a few pictures as I pass by if you would like.
As for viable, they could have a viable 7nm process. I didn't say something they could ramp up right away Ias they do have tools that they would have used in the research phase for small scale testing.
Samsung as well announced that they have a EUV "7nm" process and are beginning to mass manufacture it. So there are tools just not the ones required for what Intel would probably want to push density wise. Still doesn't mean they might not have something similar to Samsungs that is viable.
PS while I don't know the innate details of lithography I do understand it. I know there are tools required to be developed. At the same time they have to do research to develop the tools and process for use with those tools. From my understanding they typically do small scale tests trying to get the results desired then retool the FABs to suit it. My assumption is that they did research in small scale and now are retooling FAB42 for 7nm, be it EUV or a different design, as now 5nm is in research.