MSI Z77-G45 & i5-3570k

simplyjav87

Honorable
May 6, 2012
2
0
10,510
Novice builder here, well my first computer build actually, I just had question concerning system temperatures of this particular chip-set and what would be considered the norm.. as I turned on my comp this morning I jumped onto the SpeedFan utility, and Temp 1 indicates a cool 23 degrees,.. but temp 2 shows 67 and have seen climb up to 80 degrees.. the core tempatures are extremely cool so no concerns there.. just the temp 2, again forgive me, complete noob here
 
Hello.
Okay, what you are saying is that your core temps are good, but this 'temp 2' is high.

When you say chipset, there is either the North bridge or the South bridge. Check you BIOS to see what your voltage rating is set to and report it back.

NOTE: To enter BIOS, simply press the programmed key on your keyboard that the instruction describe. It is usually DEL or F10 or F12. Follow instructions.
 

simplyjav87

Honorable
May 6, 2012
2
0
10,510
Lets see,.. these are the voltages I found in my BIOS

Current CPU Core Voltage: 1.012 V [AUTO]

Current CPU I/O Voltage: 1.050 V [AUTO]

Current DRAM Voltage: 1.678 V [AUTO]


something is obviously out of line with either my mobo or the software itself cause temp2 now reads( -128 ),. :ange:

 

InvalidError

Titan
Moderator

The "north-bridge" is the chip that traditionally served as the interconnect between AGP, CPU, RAM and south-bridge/IO-Hub and was called "north" simply by virtue of being located near the top of the motherboard between the CPU and RAM. Most of its functions got integrated into the CPU with AMD's Athlon, the 'north' bridge is gone, the CPU and RAM have the motherboard's north pole entirely dedicated to them.

In a few more years, CPUs will likely take over essential traditional south-bridge functions as well and we will have chipset-less motherboards... put 2-4 USB3 interfaces on-CPU and let motherboard manufacturers add USB3 hub ICs if they want to provide extra USB ports, same with SATA3, PCIe3, etc., no more need for the DMI interface between CPU and IO Hub.
 

Yes, I am aware of all this information. Thank You for sharing, though.