Hi All,
I've kicked this around in my head and figured I'd see if my conclusions held from everyone's experience: Plus I need some clarification.
"The memory controller selects the active row. But before the row will actually become active so that the columns can be accessed, the controller has to wait for 2-3 cycles - tRCD (RAS-to-CAS delay). Then it sends the actual read command, which is also followed by a delay - the CAS latency. For DDR RAM, CAS latency is 2, 2.5 or 3 cycles. Once this time has lapsed, the data will be sent to the DQ pins. After the data has been retrieved, the controller has to deactivate the row again, which is done within tRP (RAS precharge time).
There is one more technical restriction - tRAS (active-to-precharge delay). This is the fewest number of cycles that a row has to be active before it can be deactivated again. 5-8 cycles are about average for tRAS."
(http://www.tomshardware.com/2004/01/19/ups_and_downs/page3.html)
RAM Timings are usually stated in:
CAS
RAS-to-CAS
RAS Precharge
Active to Precharge
so for 2-3-3-6 RAM, the time for the bus to actually get the data is 3+2 = 5 cycles. For the memory row to be available again, it takes 5 cycles(prev read) + 3 + 6 = 14 cycles.
Now how is a cycle defined? Is it the FSB speed? RAM speed?
In terms of performance (gaming or video/audio encoding), does having lower timed RAM make a big difference? It looks like the benchmarks in the above link don't show massive differences between the RAM run.
It makes sense that on the P4 (Winrar bench), it does matter because of the half-duplex FSB, but that's only about a few seconds.
It looks like its just the processor that holds the benchmark back, not the RAM timings. At least for the most part.
So is there any sense in my getting lower-timed RAM? Does lower-timed RAM aid in overclocking any? I guess I just want to know why people get this stuff.
Any comments/ideas/explainations would be greatly appreciated!
Thanks!
I've kicked this around in my head and figured I'd see if my conclusions held from everyone's experience: Plus I need some clarification.
"The memory controller selects the active row. But before the row will actually become active so that the columns can be accessed, the controller has to wait for 2-3 cycles - tRCD (RAS-to-CAS delay). Then it sends the actual read command, which is also followed by a delay - the CAS latency. For DDR RAM, CAS latency is 2, 2.5 or 3 cycles. Once this time has lapsed, the data will be sent to the DQ pins. After the data has been retrieved, the controller has to deactivate the row again, which is done within tRP (RAS precharge time).
There is one more technical restriction - tRAS (active-to-precharge delay). This is the fewest number of cycles that a row has to be active before it can be deactivated again. 5-8 cycles are about average for tRAS."
(http://www.tomshardware.com/2004/01/19/ups_and_downs/page3.html)
RAM Timings are usually stated in:
CAS
RAS-to-CAS
RAS Precharge
Active to Precharge
so for 2-3-3-6 RAM, the time for the bus to actually get the data is 3+2 = 5 cycles. For the memory row to be available again, it takes 5 cycles(prev read) + 3 + 6 = 14 cycles.
Now how is a cycle defined? Is it the FSB speed? RAM speed?
In terms of performance (gaming or video/audio encoding), does having lower timed RAM make a big difference? It looks like the benchmarks in the above link don't show massive differences between the RAM run.
It makes sense that on the P4 (Winrar bench), it does matter because of the half-duplex FSB, but that's only about a few seconds.
It looks like its just the processor that holds the benchmark back, not the RAM timings. At least for the most part.
So is there any sense in my getting lower-timed RAM? Does lower-timed RAM aid in overclocking any? I guess I just want to know why people get this stuff.
Any comments/ideas/explainations would be greatly appreciated!
Thanks!
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