AMD CPU speculation... and expert conjecture

[juanrga]

Here was your prediction from that BSN article that you were relentlessly spamming at the time:

This would put the multi-threaded performance of the CPU of the new quad core Kaveri APU at the same level than an Intel quad core i5 or a six-core AMD FX with traditional software.

Since we know a Bulldozer-type module loses some performance when both cores in a module are in use (not something that afflicts an i5), then that must mean that single-threaded performance must be at least as good as an i5, right?

So, did the reviews back up those two points: that both single and multi threaded performance is at the level of an i5?

Tomshardware

No

Guru3d

No

Anandtech

No

xbitlabs

No

bit-tech

No

Hexus

No

Mentioning an article published in a known independent tech site is not spamming. Moreover several people in this thread has shown his interest in that article both in public and in private. For your information, some of that people asked me to write a similar article but for Carrizo. They must be reading those lines now.

Now about the rest of your post. If you quote me out of context, give only two lines of large article, then avoid all the content and the detailed predictions I made about a concrete set of benchmarks, specially those showing that in FP heavy workloads Kaveri would be behind SB/IB (which is unsurprising because Steamroller is 8 FLOP/core whereas SB/IB are 16 FLOP/core) then you can say anything that you want.

I find it very odd that you pretend to ignore the final benchmarks of Kaveri silicon and the close agreement with my predictions on those benchmarks and, instead, you bring here a set of unrelated benchmarks from sites with different methodology, based in another OS, different compiler...

I understand that results like this (orange is prediction; red is measured; difference is 6%)

hurt the eyes of people who only know windows7 and icc-based benchmarketing.

 

[juanrga]

All the data was mentioned before. You are asking me for info that I gave before:

actually, you posted only a few of your specifications haphazardly before. never compiled like anything close to the following:

The APUs currently designed by AMD, Nvidia, and others... Nvidia HCN die size is estimated to be 290mm2. Intel has bigger die of 400nm2... Yield rate is standard for mature process... Process node is 10nm FF standard for laptops and high-performance node for desktop/server for Nvidia, Intel uses 7nmFF... Nvidia mentions 2GHz on basic node and 2.5GHz on high-performance node (those are the GPU core clocks), Intel mentions 4.61 GHz... GCN for AMD, CUDA for Nvidia... substrate is bulk with FinFETS, nobody uses SOI in its designs... AMD will use both ARM and x86 ISAs, Intel uses x86 (plus AVX-like extensions), Nvidia uses ARM, ARM ISA includes NEON extensions... uarch have no name, but we know some details about them, we know lanes, topologies, working voltages, FLOPS/core, cache sizes...

ooh, memory subsystem. i totally missed asking about memory like L1, L2, L3(in/exclusive, shared etc.)..., stacked(capacity, type, die size and power use, interface, bandwidth, clockrate et al)/embedded(same things)/none, system memory, processor-processor and processor-i/o interconnects and specs, system memory and it's specs and so on. inside the cores, alu, agu, pipeline stages (e.g. stock 4.61GHz might require rather long ones), load/store capability, how wide, etc. the more dimensions you add, the clearer it will become. what are the lanes, topologies, working voltages, FLOPS/core, cache sizes for those chips?
i didn't quite understand some of the bits (hopefully others will) like, are amd and nvidia using the same process node and same substrate? s.o.i. seems out of speculation. are the gpu core clocks base clockrates or boost clockrates?

The current multiplier depends on lots of factors such as exact clocks, final process node tech and so on... it can 8.9x or can be 10.7x. This is why I write "about 10x".

The exact year is also unimportant. It is based in standard silicon projections and evolution of current research project. More optimist guys say that technological target could be achieved before: year 2018. More pessimists people say technology will be not ready at 2020. Again this is unimportant. It does matter if it happen by February of 2020 or by march of 2022 due to delays. It will happen.

....and these apus (where are the specs for the cpu part, or is it even there?) supposed to be about 10x faster than which gpus? can i take the exact range be 8.9x to 10.7x? because 7-8x isn't "about 10x". i was thinking of baselines along the lines of tahiti based r9 290x's 20nm successor or nvidia's big gm210-something maxwell gpu. may be your baseline is different? you never mentioned any of that along with the 2020 apu specs. for example, if the baseline gpu is brazos's igpu... i forgot to ask about transistor count and lithography, and likely some other important bits like prices. it seems that you're keen on replying only the ones i typed, instead of an overall complete picture. because the comparison stays vague without sufficient info.

why is the year unimportant if you keep spamming the 2020? 2 year is a Long time in tech world, you're using a very big buffer. i thought you were confident. i don't doubt future processing devices being inevitably faster and more powerful than current ones. but it looks like you're dismissing your own claim here.

It doesn't work as you believe. It is not you making unfair accusations, then I having to refute them, and the you apologizing. It is the person who accuse who has to prove his accusation. You are not proving anything and I am mentioning just that.

in my example, i showed why i said your statements were blanket statements lacking specifics and subsequently got you to finally compile at least some of the specifics. compare your previous post to the one i posted as example and compare the content. that pretty much proves my side. that was just one of numerous examples though.

i should point out that others have been too eager to argue the possible existence of the device within the claimed time limit instead of simply asking for specifics like i did. without specifications you leave room for huge inaccuracies.

I have given that info before, but in different posts, not in condensed form. This shows you don't read my posts. you ask me now again about some stuff that I posted before. I have mentioned the use of a L0/L1/L2 hierarchy, LLC amount, DRAM size, interface and spec, memory subsystem bandwith, power consumption, stack topology, interconnects and bandwiths... there is other stuff that I have not given as number of lanes, pipeline stages, wide issue... but I have given other details such as SSD amount and NVRAM technology used. I could give other details such as SMTn level.

The clocks given are base. I don't know the turbo frequencies.

I have given some main specs of the CPU such as number of latency cores.

However, all those details are irrelevant. It is irrelevant which node is used, it is irrelevant which are the clocks, it is irrelevant how many FLOP/core gives the uarch... because the reason why the APUs will be 10x more faster than a CPU+dGPU doesn't depend on any of those details. I already explained why. Everyone in the industry, including Nvidia/Intel/AMD engineers know that and that is why are replacing dGPUs.

No, the exact range is not 8.9x to 10.7x. That was only for illustrative purposes. Moreover, 8x rounds to 10x not to 1x. Do you know what is the order of magnitude?

The baseline is not a current dGPU neither a current dGPU migrated to 20nm. I already explained which is the baseline.

When I claim that dGPUs will be killed by about 2020, evidently it is unimportant if this happen in 2018 or in 2022. Very irrelevant.

I will be on vacations. Please feel free to mention me, to lie about me...

 

[de5_Roy]

I have given that info before, but in different posts, not in condensed form. This shows you don't read my posts. you ask me now again about some stuff that I posted before.

i read all posts in this thread, that's how i know most of the stuff weren't posted before in the correct context.

I have mentioned the use of a L0/L1/L2 hierarchy, LLC amount, DRAM size, interface and spec, memory subsystem bandwith, power consumption, stack topology, interconnects and bandwiths... there is other stuff that I have not given as number of lanes, pipeline stages, wide issue... but I have given other details such as SSD amount and NVRAM technology used. I could give other details such as SMTn level.

for instance, LLC can be the L3 cache in one apu(e.g. intel's) and L4 cache in another(e.g. amd). L3 is usually in much smaller capacity than L4 but either one can be LLC. you never specified which level will be LLC in which apu. additionally, you never mentioned cache sizes in proper context. same goes for power consumption, interconnects and bw.

The clocks given are base. I don't know the turbo frequencies.

I have given some main specs of the CPU such as number of latency cores.

However, all those details are irrelevant. It is irrelevant which node is used, it is irrelevant which are the clocks, it is irrelevant how many FLOP/core gives the uarch... because the reason why the APUs will be 10x more faster than a CPU+dGPU doesn't depend on any of those details. I already explained why. Everyone in the industry, including Nvidia/Intel/AMD engineers know that and that is why are replacing dGPUs.

why are these irrelevant? please, do post those. these are very relevant for another factor i forgot to add and you didn't mention - workloads. in which workloads will these apus be about 10x faster than gpus?

No, the exact range is not 8.9x to 10.7x. That was only for illustrative purposes. Moreover, 8x rounds to 10x not to 1x. Do you know what is the order of magnitude?

The baseline is not a current dGPU neither a current dGPU migrated to 20nm. I already explained which is the baseline.

i see that you're avoiding posting your baseline (type of workloads is very important as well). you do specify that it's not a current dgpu like tahiti or gm200 class. are you purposefully avoiding comparing to the highest performing gpus available today or in the near future? otherwise you woulda mentioned the baseline instead of resorting to incessant "already posted somewhere else in the thread". this is not just compilation, it's also putting claims into proper context and specifying the vague parts.

When I claim that dGPUs will be killed by about 2020, evidently it is unimportant if this happen in 2018 or in 2022. Very irrelevant.

it's relevant because i for one, don't want to see idiotic spamming in 2022 after a technological breakthrough in 2021 or in 2023. claiming the exact breakthrough along with the right timeframe would good though.

i hope others add the specifications or type of loads or any other type of info i've missed. like tdp or encoding resolution or memory bus width etc.

 

[Cazalan]

I think we can all agree the only way an APU will beat a dGPU is if they stop making dGPUs.

 

[Cazalan]

Spoiler

Seattle is ready and it is on gf 28nm
http://www.zdnet.com/amd-opteron-64-bit-arm-based-developer-kits-now-available-7000032158/

Did you see the price? $2999 for a 4 core dev kit. Yikes!

price for early admission i guess. i also assume that the system memory in that kit is rather costly. stil... 4 cores for 3 grand, certainly worth poking fun at, imo.
for example: why is the cpu just 4 cores? wasn't arm bragging about high yield rates for their socs?
the cache specs are missing. from the sdk specs, it seems like the cpu/soc is split into 2 clusters of 4 cores and shared L2 cache. i thought it'd be split as 4 clusters of 2 cores sharing L2 cache while 8MB L3 cache is available to all cores. i think the reason amd is going custom so quickly may be hidden in the a57 soc designs.

A 2x8GB Registered ECC kit is $170-$350 depending on speed grade. A dual 10G NIC can run $440. Still a huge markup for a quad core. Now convince Facebook to buy a million of them so AMD can be profitable again.

 

[8350rocks]

Actually, what they told you was SOI did not do this or that...

What they have admitted to me was, if they could have remained profitable by assisting with the development for FD-SOI @ 28nm they would have.

Additionally, AMD engineers concede without contest the ENTIRE REASON Kaveri is lower clocked was because bulk did not pan out as they had hoped. The early ES tape outs were showing promise, and then when they got to full ramp to see what a production sample would look like, they could not even get to Richland clocks without having to skew TDP to 125W and the part had to be a 95W part. The substrate is ENTIRELY the culprit.

Also, AMD have conceded that SOI may come back into play around 10-14nm because FinFET on FD-SOI has better thermal properties and would likely offer better performance with lower power consumption at higher clocks...(as illustrated by Richland being 100w parts with 10-12% higher clock rates over the 95W Kaveri).

Therefore your FUD about substrate is completely off.

Additionally, the FF interconnects are capable of FAR more than 10 Gb/s per socket. It is proprietary, and they do not advertise above and beyond what is necessary because the technology is vastly superior to anything available in the server space, and is also one of the most energy efficient interconnects available period.

As far as their plans for HPC go, I asked about APUs, and the answer I got was..."we have not fully decided that will be the best route yet, we are still experimenting..."

So, unless you know something that people at AMD do not, I cannot see how you can sit there and say with certainty that is what it will be.

Things are just too undefined at the moment to make assumptions, and you are making very strong assumptions without critical information. You cannot possibly have the information to make that decision, because the companies trying to execute it themselves do not yet have that information, and you are not an insider.

Just stop while you are this far behind. Please. You keep digging deeper holes, and you are just shoveling dirt onto your own back at this point.

FD-SOI cannot provide the needed density for Kaveri and lack a migration path to finfets.

The reduction from 100W to 95W almost entirely explains the reduction in clocks. The other part of the reduction is from the use of HDL.

No main foundry is planning high-performance SOI for 10 or 14nm. SOI will only account for about 5% of total foundries volume, because it is massively rejected by engineers. Moreover one friend of mine says that AMD has selected TSMC 16nm finfet for K12.

Current FF interconnect gives 10 Gb/s per socket. I mentioned that future versions can give 10--15x more throughout and that is good as APU--APU interconnect but slow and inefficient for CPU-GPU.

Sure AMD is experimenting, but their plans about HPC are based in APUs, as AMD has explained in public.

There are already FinFETs on FD-SOI. Read IBM's white papers on 22nm FinFET on FD-SOI with collaboration from STMicro.

As for your assumptions, let me assure you...when I was at AMD in Austin, the gentleman who was explaining it to me said Tb/s...I checked to clarify, and he did not bat an eye lash when he confirmed what he had said before...

 

[szatkus]

hurt the eyes of people who only know windows7 and icc-based benchmarketing.

And 99% of Linux users...

 

[noob2222]

im going to let the community answer this one

If one specific cpu in a very particular benchmark has a baseline of 3682, and somoeone predicts that an improved cpu will have a score higher than the i5 2500k that scored 3218, does that mean the cpu is faster in any and all benchmarks?


seriously dude, richland was already faster than the 2500k in john the ripper, and is nowhere near i5 2500k performance overall.

now another question.

if your baseline is 3682 and you predict that the new one will score 4310, but only scores 4053, how far off was the prediction?

Hint: its not 6%

anyone ever wonder why the baseline wasn't included, and why its still not?

as for apus replacing dgpu by 2020, that one relies on a lot of only ifs.

only if gpus stop advancing
only if they produce no heat
only if games stop advancing and pushing gpu specs
only if 4k & 8k die

ya, a 290x can't even push 4k to 60 fps.

 

[de5_Roy]

haven't seen any amd cpu/apu/soc stuff yet. so have some tonga
http://www.fudzilla.com/home/item/35382-amd-tonga-gpu-comes-as-radeon-r9-285
tahiti on 256bit bus.

so to keep on topic: weren't the arm socs supposed to come out around now? amd is shipping seattle to developers, so those should coming out soon.

 

[cdrkf]

Yes juan lost all credibility and sanity with the allegation of the A10 7850k being on par with 2500k.....hahahah

RAM isn't moving onto the die for reasons already explained. Its costs MORE to RAM on the CPU die. It draws MORE power. You don't have the transistor budget. And apps aren't RAM bandwidth limited, so there's no reason for it.

Gamer do you think we will ever see 8GB of Vram on the APU alone being sold as mainstream gaming parts? Or do you picture only a small buffer for example at the most 512mb of vram?

"Ever" is such a loaded term, especially since CPUs are going to look very different in 20 or so years. Short term though? Maybe 128MB or so of cache on die just for the GPU portion. Any more makes the part too expensive to mass produce. And I suspect I'm being VERY generous here.

I think IRIS PRO already uses 128mb, personally I think *if* stacked memory actually turns into a 'thing' we might see a bit more than that in the not too distant future (maybe)....

Except the eDRAM isn't on the CPU die itself; its external.

http://www.anandtech.com/show/6993/intel-iris-pro-5200-graphics-review-core-i74950hq-tested/3

Also worth noting:

I asked about the potential to integrate eDRAM on-die, but was told that it’s far too early for that discussion. Given the size of the 128MB eDRAM on 22nm (~84mm^2), I can understand why. Intel did float an interesting idea by me though. In the future it could integrate 16 - 32MB of eDRAM on-die for specific use cases (e.g. storing the frame buffer).

So we're right back to limited die space, hence why its external of the main CPU die. Its essentially acting as an external L4 cache.

Hmm interesting- in which case we'll probably see more on-package memory rather than 'on die'. The main thing is that baked into the same physical processor would permit the use of very wide interface (just like the GDDR5 ram used on graphics cards), so it would still be a big benefit for APU performance.

 

[cdrkf]

haven't seen any amd cpu/apu/soc stuff yet. so have some tonga
http://www.fudzilla.com/home/item/35382-amd-tonga-gpu-comes-as-radeon-r9-285
tahiti on 256bit bus.

so to keep on topic: weren't the arm socs supposed to come out around now? amd is shipping seattle to developers, so those should coming out soon.

Seattle isn't due for official release until next year. It's pretty promising that they've already got the dev kits out, so obviously they have got working silicon (although I noted the dev kits only used the quad core variant rather than the larger 8 core version). Still it does look like Rory is sticking to his pledge of "execution, execution, execution"... Things keep rolling out from AMD roughly on time, it can only be a good thing moving forward!

 

[esrever]

@esrever: interesting - evolved memory hierarchy. is it something like in-memory processing?

I just meant it as where information is stored for a program is always in a memory hierarchy and that this can change as our memory systems change and evolve. I think in memory processing is something else entirely.

 

[esrever]

haven't seen any amd cpu/apu/soc stuff yet. so have some tonga
http://www.fudzilla.com/home/item/35382-amd-tonga-gpu-comes-as-radeon-r9-285
tahiti on 256bit bus.

so to keep on topic: weren't the arm socs supposed to come out around now? amd is shipping seattle to developers, so those should coming out soon.

Seattle isn't due for official release until next year. It's pretty promising that they've already got the dev kits out, so obviously they have got working silicon (although I noted the dev kits only used the quad core variant rather than the larger 8 core version). Still it does look like Rory is sticking to his pledge of "execution, execution, execution"... Things keep rolling out from AMD roughly on time, it can only be a good thing moving forward!

Seattle has been shipping for a while I think, what is coming out next year is the integration into a single socket for ARM and x86.

 

[de5_Roy]

Seattle isn't due for official release until next year. It's pretty promising that they've already got the dev kits out, so obviously they have got working silicon (although I noted the dev kits only used the quad core variant rather than the larger 8 core version). Still it does look like Rory is sticking to his pledge of "execution, execution, execution"... Things keep rolling out from AMD roughly on time, it can only be a good thing moving forward!

amd showed the sdk motherboard in a promo slide:
http://www.extremetech.com/computing/175583-amd-unveils-its-first-arm-based-cpu-the-64-bit-8-core-opteron-a1100
i'm guessing that the cpu in that promo slide was 4 core cpu.

 

[cdrkf]

haven't seen any amd cpu/apu/soc stuff yet. so have some tonga
http://www.fudzilla.com/home/item/35382-amd-tonga-gpu-comes-as-radeon-r9-285
tahiti on 256bit bus.

so to keep on topic: weren't the arm socs supposed to come out around now? amd is shipping seattle to developers, so those should coming out soon.

Seattle isn't due for official release until next year. It's pretty promising that they've already got the dev kits out, so obviously they have got working silicon (although I noted the dev kits only used the quad core variant rather than the larger 8 core version). Still it does look like Rory is sticking to his pledge of "execution, execution, execution"... Things keep rolling out from AMD roughly on time, it can only be a good thing moving forward!

Seattle has been shipping for a while I think, what is coming out next year is the integration into a single socket for ARM and x86.

Hi, did a bit of digging- Seattle isn't due to actually ship until Q4 but it is this year your right...

 

[jdwii]

As always the majority of the benchmarks matter more than a few so even if juan is right on a couple of benchmarks(never even heard of john the ripper before) then fine. But the majority is what matters in terms of benchmarks. For example in the majority of benchmarks the 8350fx is above the I5 but in gaming its around I3-I5(except in newer games).

 

[Fidgetmaster]

the 8350 still needs OCed to perform on par with Intel....

 

[cdrkf]

the 8350 still needs OCed to perform on par with Intel....

Stock compared to stock, the 8350 is usually pretty close to I5, at least in multi-threaded things. Admittedly single core vs single core AMD doesn't have anything to compete.

Key point here though is many many more applications actually use more threads now so the 8350 is ageing quite well, and given it's price it's actually quite a bargain now. The main downside to it is that you don't really have anywhere to go beyond that whereas you can always get an i3 on a reasonable motherboard and have a good opportunity to upgrade in the future if you go Intel.

 

[de5_Roy]

I just meant it as where information is stored for a program is always in a memory hierarchy and that this can change as our memory systems change and evolve. I think in memory processing is something else entirely.

ah, i see that now.

As always the majority of the benchmarks matter more than a few so even if juan is right on a couple of benchmarks(never even heard of john the ripper before) then fine. But the majority is what matters in terms of benchmarks. For example in the majority of benchmarks the 8350fx is above the I5 but in gaming its around I3-I5(except in newer games).

google says it's a ...uhm... security testing tool. i am afraid that discussing it may violate tom's t.o.c.....? anywho, the benchmark seems to show high degree of variance depending on flags used, o.s., heterogenous processing(where gpu also works), software versions etc. it's not a gaming benchmark.

 

[Fidgetmaster]

Still the though 8350 is kinda slow at stock 4ghz....my 920 Oced to 4ghz even beats it in some areas....the 8350 is much better waaay up there....and you are correct how more applications are starting to use/benefit more threads.

 

[de5_Roy]

amd a10 7800 review
http://www.anandtech.com/show/8291/amd-a10-7800-review-65w-kaveri
http://www.anandtech.com/show/8288/amd-launches-65w-45w-kaveri-apus-a10-7800-a8-7600-a6-7400k
i knew that teaser the other day was about a10 7800! another prediction confirmed! even if i didn't predict anything!

AMD Readies Steamroller Based A4-7300, Athlon X4 860K / 840, Athlon X2 450 and FX-8370 For AM3+ Processors For Q3 2014
http://wccftech.com/amd-readies-steamroller-based-a47300-athlon-x4-860k-840-athlon-x2-450-fx8370-am3processors-q3-2014/
so the new unlocked athlon is 860K. but the real news is the eol of a88x chipset. so far, we've seen chipsets carry over to the next apu or socket. this may be the indication of a change in carrizo's chipsets and the bga socs.

 

[cdrkf]

amd a10 7800 review
http://www.anandtech.com/show/8291/amd-a10-7800-review-65w-kaveri
http://www.anandtech.com/show/8288/amd-launches-65w-45w-kaveri-apus-a10-7800-a8-7600-a6-7400k
i knew that teaser the other day was about a10 7800! another prediction confirmed! even if i didn't predict anything!

AMD Readies Steamroller Based A4-7300, Athlon X4 860K / 840, Athlon X2 450 and FX-8370 For AM3+ Processors For Q3 2014
http://wccftech.com/amd-readies-steamroller-based-a47300-athlon-x4-860k-840-athlon-x2-450-fx8370-am3processors-q3-2014/
so the new unlocked athlon is 860K. but the real news is the eol of a88x chipset. so far, we've seen chipsets carry over to the next apu or socket. this may be the indication of a change in carrizo's chipsets and the bga socs.

Where was info about a88x EOL?

 

[Ranth]

Where was info about a88x EOL?

There’s also some information regarding the EOL dates for several chipsets which show that AMD’s A78, A58, A55 and even the A88X chipset will retire in December 2014. Along side the new Kaveri lineup, AMD has also announced anew A10 Game bundle promotion which rewards you with one AAA title (Thief/ Sniper Elite III/ Murdered Soul Suspect) on the purchase of an AMD A10 APU adding $60 US value.

Search for "EOL" and you'll find it.

 

[cdrkf]

Where was info about a88x EOL?

There’s also some information regarding the EOL dates for several chipsets which show that AMD’s A78, A58, A55 and even the A88X chipset will retire in December 2014. Along side the new Kaveri lineup, AMD has also announced anew A10 Game bundle promotion which rewards you with one AAA title (Thief/ Sniper Elite III/ Murdered Soul Suspect) on the purchase of an AMD A10 APU adding $60 US value.

Search for "EOL" and you'll find it.

Ah thanks, well if they're going EOL in dec 2014 on FM2+, then FM3 socket (or something similar) has to be coming soon, so hopefully Carrizo will make it to the desktop rather than being mobile only.

 

[8350rocks]

What will end up happening will be basically like the changeover from AM2+ to AM3. Essentially the right boards will be forward compatible, though they will be pushing FM3 I am sure...