AMD Piledriver rumours ... and expert conjecture

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We have had several requests for a sticky on AMD's yet to be released Piledriver architecture ... so here it is.

I want to make a few things clear though.

Post a question relevant to the topic, or information about the topic, or it will be deleted.

Post any negative personal comments about another user ... and they will be deleted.

Post flame baiting comments about the blue, red and green team and they will be deleted.

Enjoy ...
 
serious question.
with the difference in power consumption shown, does it compensate for the difference in CPU performance.?
doesn't the Intel CPU crunch harder than the AMD CPU and if so then how much, or does the AMD CPU also crunch more.?
not speaking on the graphics part but the actual CPU.
depends on what is ran but the i5 seems to be up to 2x as fast as the llano in cpu benchmarks. In pure CPU stresstests the i5 is only about 10-20% more power draw than llano so it is a lot more efficient if you are doing heavy cpu computations. The test was for laptops so generally all you'd be doing on battery would be web surfing and maybe movie playback. The llano has slightly lower power consumptions in that.

during CPU and gpu loads llano become a lot more efficient, with a max TPD of 35w for both CPU and GPU with heavily loaded synthetic loads. Intel doesn't seem to account for the intel graphics when calculating TPD on mobile cpus. Thus the complete chip can shoot past the max CPU TPD if both cpu and igp is heavily loaded. thus Llano become much more efficient during Gaming when both cpu and gpu is loaded even if you were just gaming on the HD3000 with sandybridge.

All in all it really shouldn't matter much unless you are gaming without external power. But a 35w chip using 45w of power could cause overheating if you buy a laptop with insufficient cooling.
 
quote-

This acquisition of shares is the latest in a series of announcements marking significant milestones as GLOBALFOUNDRIES continues to gain strong momentum in the global semiconductor industry: ' AMD's 32nm processor shipments increased by more than 80 percent from the third quarter to the fourth quarter and now represents a third of AMD's overall processor mix. In fact, GLOBALFOUNDRIES exited 2011 as the only foundry to have shipped in the hundreds of thousands of 32nm High K Metal Gate wafers.

source-
http://www.electroiq.com/semiconductors/2012/03/06/globalfoundries-marks-third-anniversary-by-achieving-full-independence.html

IIRC Intel and I think AMD usually hit the 50% or higher mark one year after beginning shipments of stuff on a new node. AMD & GF supposedly started shipping Llano about one year ago, which means if they are just now hitting 33%, they did have some serious problems with their 32nm ramp compared to previous nodes and to Intel.
 
Also good for PS4, to combat Kinect.

Unless some really compelling stuff comes out for it, I'll stick to my PS3 P.. I got a couple free games due to Sony's screwup last summer, so with the ones I bought, I'm still good entertainment-wise. Actually, to tell the truth I use it more for its excellent BD playback than anything else. I have a Pioneer 50" plasma TV and an Onkyo AV receiver connected to a Klipsch 7.1 surround setup, in my home "office" (aka man-cave), so it's pretty awesome watching Avatar, etc. I had the foresight to have the room fully sound-insulated while the house was being built, so no problem with the wife watching TV in the family room even with the 350 watt sub thumping out the low freqs 😛..

Well OK she does pound on the door when it gets too loud, but that's a lot louder than it would be without the soundproofing..
 
Yeah that's great power savings if true. Probably the most significant news on PD in the last 2 months.
The top end Llano is 100W now @ 3Ghz.

its good, but not all that gr8 actually, the fx 4100 has 8MB of cache, plus 2x 2MB of unused l2 cache in 2 more unused modules......that too its comes clocked in @3.6 GHz.

get rid of all that and make a native 2 module die without L3, then clock it down to 3GHZ, i see reaching 45w becomes very easy....the rest of the power savings mostly comes from that LC tank ckt tech. from cyclos i guess...
 
its good, but not all that gr8 actually, the fx 4100 has 8MB of cache, plus 2x 2MB of unused l2 cache in 2 more unused modules......that too its comes clocked in @3.6 GHz.

get rid of all that and make a native 2 module die without L3, then clock it down to 3GHZ, i see reaching 45w becomes very easy....the rest of the power savings mostly comes from that LC tank ckt tech. from cyclos i guess...

Problem is that its more cost effective for AMD to make one die size, then bin them. Instead of having multiple die sizes they just cut/turn off bad cores.

Probably with current yields, probably not great but ok, they save more money that way.

Intel has only done it so far with one, SB-Es 6 core CPUs. Not sure why but maybe it makes sense. The quad core however is just a quad core. Much like SBs dual cores are just dual cores. But then again Intels process is modular, the current setup, and is probably why they have the cores laid out horizontally so they can add or remove cores at will. I am sure they could make a three core and name it a i4 if they wanted.

Might be the best way for AMD to go in the future too.
 
thinking of upgrading my notebook hence all the questions and sometimes banter...
older Dell D620 with nForce chipset igp (the one that didn't burn up..)
C2D T7200 2.0GHz.
doesn't have to game but it might be nice to just in case.
not concerned about battery life, just the average is fine because it's got to be better than my current regardless..

You picked a great time to upgrade where desktop has only sidegrades the mobile has great progress.
 
IIRC Intel and I think AMD usually hit the 50% or higher mark one year after beginning shipments of stuff on a new node. AMD & GF supposedly started shipping Llano about one year ago, which means if they are just now hitting 33%, they did have some serious problems with their 32nm ramp compared to previous nodes and to Intel.

Intel's yeilds are ~50% when shipments begin.
 
Problem is that its more cost effective for AMD to make one die size, then bin them. Instead of having multiple die sizes they just cut/turn off bad cores.

Probably with current yields, probably not great but ok, they save more money that way.

Intel has only done it so far with one, SB-Es 6 core CPUs. Not sure why but maybe it makes sense. The quad core however is just a quad core. Much like SBs dual cores are just dual cores. But then again Intels process is modular, the current setup, and is probably why they have the cores laid out horizontally so they can add or remove cores at will. I am sure they could make a three core and name it a i4 if they wanted.

Might be the best way for AMD to go in the future too.

well i was actually talking about the trinity die, about how 2 modules+graphics could fit under 65W :)

Anyway, if you compare the number of FX-4100's sold vs FX 8120+8150 and 6100 together at Newegg, i'd say its high time for AMD to make a native 2module FX..... a 125W 4170 is a really sad joke!!

btw love the i4 idea, 3 cores with HT, clocked at 3.4ghz/3.7 turbo and with say 4MB L3 cache, at around $165 would be an instant hit 😀 😀
 
well i was actually talking about the trinity die, about how 2 modules+graphics could fit under 65W :)

Anyway, if you compare the number of FX-4100's sold vs FX 8120+8150 and 6100 together at Newegg, i'd say its high time for AMD to make a native 2module FX..... a 125W 4170 is a really sad joke!!

btw love the i4 idea, 3 cores with HT, clocked at 3.4ghz/3.7 turbo and with say 4MB L3 cache, at around $165 would be an instant hit 😀 😀
Im pretty sure AMD just said f that with bulldozer and don't want to even bother with a new stepping. They are focusing their efforts on trinity.
 
AMD needed the changes, new leaders and ideas, unfortunately it all costs money, which compared to Intel AMD are more like begger princes that outright kings. PD just needs tweaking, shorter pipelines, perhaps smaller cache and lower latencies will be a vast improvement.

In the real world though, there is nothing wrong with the BD, it just is the victim of overhype and fanboism.
 
A lot of conjecture is created by benchmark numbers but I consider them indeterminable, I have my 2500K clocked at 5ghz improved the RAM timings and in one run on SuperPI I got 1m 24.256, the run immediately after the time droped to 1m 25.086, eight tenths droped in a matter of seconds, which is why benchmarks to real world performance is grossly irrelevent, BD is not as strong as SB per core but the overall performance is not as wide a gulf as made out to be, my 8120 with dual 7950's is within 5% FPS to that on my 2500K with the same cards. Sure there are games with the odd micro stutter but they are few and far between, for the average end user the BD is copious and cheaper.

Right now AMD cannot compete at the highest end, but at least I hope PD is competitive.
 
not in my real world, the chip has issues... :pfff:

If you want to compare it to Phenom II and SB, the only major issue, is the price IMO.

It was a bad joke the Phenom II's were way cheaper and performed better. Now they're more scarce, so FX has to lower their price point as much as AMD can to be compelling.

I know you and me won't be getting this FX gen, but that's because we already have OC'ed PhIIs to play with. For a new build, it's all about price, mal. And right now, FX is no P/P winner.

Cheers!
 
I hope it does, do not get me wrong.
I run both AMD and Intel and run my AMD more than the Intel.
So my fingers are crossed as I already have the hardware to run it, GA-990XA-UD3.
To be honest my 965BE @ 3.8GHz stock voltage has my quite content for now, not my gaming unit.
With a voltage bump I can Prime95 @ 4.2GHz holding below 65C (on air) if I wish and that alone will smash the FX-41xx and FX-6xxx models.
Instead of dumping my AMD unit, I built a i5-2500K on a Z68.
I realize that AMD's time is about up in the CPU (desktop) arena unless something miraculous happens.
Hell, I love and wish for miracles all the time.. :??:
The FORCE is leaving them young jedi..

:lol:
my 1090t runs stable at 3.9ghz at x4 at stock voltage and remain around at 45'c during prime95 on stock cooler with a cheap 880 board.

But it is not stable at 4.3g at even 1.55v at x4
 
well i was actually talking about the trinity die, about how 2 modules+graphics could fit under 65W :)

Anyway, if you compare the number of FX-4100's sold vs FX 8120+8150 and 6100 together at Newegg, i'd say its high time for AMD to make a native 2module FX..... a 125W 4170 is a really sad joke!!

btw love the i4 idea, 3 cores with HT, clocked at 3.4ghz/3.7 turbo and with say 4MB L3 cache, at around $165 would be an instant hit 😀 😀



I am not sure if modular is the key to compete but certainly is one of the turn key.
In my sincere opinion, AMD is simply too focused on big business server grade processors, just not enough for Workstations and even less for mass home market processor line.
I believe the three share a form of symbiotic relationship in some ways and perhaps in many ways.
Maybe that is what Intel is doing right now too by retargetting big business with their 2600 procesor line before anything else?

Cheer,
Seb
 
Simply put Intel has many times more money for R&D then AMD does. The fact that AMD can even compete (even if their losing their still competing) is a miracle in and of itself. Personally I wouldn't use a BD nor would I recommend it to anyone, but they are selling and AMD is making a profit off them (prior to GF related expenses). Their funneling that money back into R&D which in turns makes the product better.

The whole idea behind the modular approach was to separate the CPU into different components and preparation for fusion and heterogeneous computing. AMD wants to move away from relying 100% on the x86 instruction set as Intel has entirely too much control of it (see FMA4 vs FMA3 debacle). Intel wants to do a similar movement but retain x86 as the dominate ISA for obvious reasons. It'll be interesting to see what happens in the next five to ten years. We are now hitting a serious problem with the scalability of the x86 ISA, it was never designed for SMT / CMT and it's machine language is too bulky and unpredictable to scale much faster. Cast in point is that front end predictor / decoder unit is larger then a full integer unit. How much simpler would design's be if we didn't have to decode instructions into micro-ops and deal with the resulting management overhead?
 
No need for the anger there man. I was wrong. Forgot its their servers that do that.

Doesn't mean they will never switch since average DT users will never hit the max TDP consitently.

And trust me, after working on as many systems as I have I can tell you the OEMs never provide more cooling than the average user will need unless its a "gaming" PC. Even then they still have some pretty bad cooling on those too.

And Yuka, I think nVidias power usage is horrible too. It just shows that the arch is inefficient, much like NetBurst, Barcelona or Bulldozer were/are. Of course I don't think it will change with Kepler. nVidia tends to use more power than ATI/AMD does, which is another reason I like to go with Radeon. No need to spike my power bills.

Actually from http://www.theinquirer.net/inquirer/opinion/1050824/amd-talks-acp-vs-tdp

AMD talks ACP vs TDP again
Powering on
By Sylvie Barak
Wed Feb 04 2009

AT THE INQ we have recently discovered the joys of Twitter, especially when it leads us to interesting snippets we can really tear into. Case in point, a post twittered by AMD's Senior Veep and CMO, Nigel Dessau, concerning ACP vs TDP power measurements.

It is not the first time AMD has tried to convince the world its ACP measurement (or 'fake-a-watt' as we here at the INQ fondly call it) is the way to go, but after reading Nigel's blog, we decided the discussion needed some INQput.

Dessau is right when he starts off by saying tools should reflect real-world conditions, but we tend to disagree when he continues that ACP (Average CPU Power) is the real test of these conditions.

In many ways, ACP is an arbitrary definition conjured up by AMD which no other player within the industry has accepted. Instead, the big industry players like Intel, Sun, HP and IBM have settled on the suite of SPECpower benchmarks run by a committee of industry players hailing from all those firms and even AMD. This, for the most part, promotes TDP (Thermal Design Power), a measurement Intel favours and which AMD considers inherently biased.

But before we get into things, it's important to point out there is a difference between Intel's and AMD's version of the benchmarketing tool.

AMD TDP shows the worst case power draw a particular chip can experience when it's operating at max voltage.

A chip can easily draw a lot of power, but usually only for very short periods of times (like several microseconds). If enough power isn't provided, bits and bobs get lost along the way and calculation errors start cropping up, which is really bad news. So, one would need to be able to supply that much power to the CPU at any given moment, even though CPUs can't draw max current for extended periods – even, say , 1/1000th of a second – making it all very difficult. Over 1/1000th of a second, the CPU could draw between 75-150 watts, but average power usage might be 110W.

When a firm is designing heat sinks, it only really cares about those longer periods of time, while people interested in the actual power, really care about every microsecond.

Intel has a spec for the maximum power of a CPU, it also has TDP, for its heat sink/cooling guys to worry about and adds a thermal diode to shut down the CPU if it starts overheating.

AMD, which only recently began using thermal diodes, has had to be more conservative in designing heat sinks, because the chip could actually overheat. Thus, the firm has had to keep its TDP more conservative than Intel's, hence the reason AMD would rather not talk about it and use a different metric.

AMD uses a blend of different workloads to get ACP, whereas what anybody really cares about is average power draw on the workload and peak power draw/cooling needs. ACP is just an average. It depends on process technology, the temperature the CPU is operating at, ambient temperature and more, making it mighty difficult for someone outside of AMD to calculate.
 
Intel's yeilds are ~50% when shipments begin.

You misunderstood - what I meant was the mix of the old node and the new one - the so-called "crossover point". For example, AMD is only shipping 1/3rd of product on the 32nm node, and the rest on 45nm or 40nm (for the Brazos lineup) if you go by the article. Typically Intel and AMD hit the crossover point around 1 year after initial shipments on the new node.

If yields on the new node are a problem, then the crossover point gets pushed further back. IIRC AMD announced that they were taking the last orders for their P2 (45nm node) last quarter, so that means once they have fulfilled all those orders they will be be entirely on the new node..
 
CISC vs RISC. Each has their advantages and drawbacks. As long as Intel/AMD can keep improving X86 performance it will live on. Transactional cache is another step.

X86 has to keep advancing or ARM will take over.
The last time RISC was trying to take on the desktop was with Sun Solaris boxes.
 
CISC vs RISC. Each has their advantages and drawbacks. As long as Intel/AMD can keep improving X86 performance it will live on. Transactional cache is another step.

X86 has to keep advancing or ARM will take over.
The last time RISC was trying to take on the desktop was with Sun Solaris boxes.

The last RISC CPU made was the SB. There is no such thing as "CISC". RISC isn't a standard, it's a set of principles and philosophies that engineers are encouraged to go by to keep processors clean and efficient. There are entire books discussing the various recommendations, the biggest and most important one is that every instruction should be executed within one clock cycle. That is important because it makes scheduling and prefetch easy to do, the instruction's become very predictable when you don't have variable execution times. The last "CISC" CPU if you insist in using that term would be the Intel Pentium processor. The Pentium Pro used microcode and had moved on to an internal RISC uArch.

Modern CPU's are all RISC, even Intel's. The core computing components all process using a propriety vender specific machine code that is designed with the RISC principles. On top of that you have the x86 decoder which takes the x86 instructions and breaks them into their component RISC instructions for internal dispatching and execution.

An easier understanding would be to look at how Java and the JVM works. Your program is written in Java and then compiled to Java binary code (analogy of x86 machine code). The JVM then takes that code and recodes it into the uArch's native language for execution (analogy of the RISC instruction decoder on CPUs). No matter how efficient you make the JVM, there will always be a performance penalty occurred due to the translation. Just as no matter how efficient you make your x86 binary, there will always be a penalty occurred from having to translate it into micro-ops for execution. The reason for Java (and other interpretive languages) is the same as the venders using x86, universal backwards compatibility. You don't have to recompile every piece of software for SB vs BD vs Phenom II vs Core vs Athlon vs Pentium 4 and ect.

If a processor vender (AMD / Intel / Via) decides they want to redo their internal instruction sets they can without fear of breaking backwards compatibility. Again the downside is that x86 isn't particularly good at multiprocessing / scaling.
 
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