Samsung and TSMC think 3nm is possible, and have it on the their road maps, ~2021. This is heavily dependent upon the development of an EUV process to make it cost effective to produce.The main problem with making these smaller chips is "COST". Manufacturing has always been about making a cost effective solution. They can make these higher density chips, at such a slow rate it's not economical. As I've pointed out in another post
here . Also, the proper tooling to make these smaller features is not supposed to show up until 2021.
their new tool (again it won’t even be arriving at fabs for evaluation until 2021)
https://thechipcollective.com/posts/moshedolejsi/what-is-up-with-euv/
It's a hard task and the physics is getting more tricky, but it's possible.
As far as the future of processing, I see A.I. developing hardware and software. You can see that A.I. is already better at strategy games than human beings, and once it's able to learn how to build CPUs and code it will be a game changer. I think we will also see more specialized cores to run specific tasks.
Edit: I just wanted to add here the current processes in mass production, and their transistor density. While "nodes" is just a name to describe, you can look back and see at 130nm it really hasn't been accurate.
Intel's 22 nm process (2012) had 16.5 MTr/mm², 14 nm process (2014) had 44.67 MTr/mm², and 14++ nm process had 37.22 MTr/mm²
https://en.wikichip.org/wiki/mtr-mm%C2%B2
8nm uHD cell has a transistor density of 61.2 MTr/mm²
https://fuse.wikichip.org/news/1443/vlsi-2018-samsungs-8nm-8lpp-a-10nm-extension/
There is a little information about 3nm on
here
TSMC's 7nm HD
96.49 MTr/mm²(estimated), and the
7nm HPC is 67 MTr/mm²(AMD is using this process for CPU/GPU)
Seeing is believing. Look at the side by side comparison of GlobalFoundies 14nm vs TSMC's 7nm. 4 chiplets vs 8 chiplets(that is a 14nm I/O package in the middle)