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Other sources also suggest that foundries 7nm will be similar or slightly denser than Intel's 10 nm

Intel 10 nm SRAM sizes (Source intel, Scotten Jones claims same sizes)
HP 0.0441 µm²
LV 0.0367 µm²
HD 0.0312 µm²


Foundries 7nm SRAM sizes: (https://en.wikichip.org/wiki/7_nm_lithography_process)
TSMC (HD) 0.027 µm² (Scotten Jones claims same size)
GF (HD) 0.0269 µm²
Samsung (HD) 0.0260 µm² (Scotten Jones claims 0,030µm²)

Regarding timing: https://www.hpcwire.com/2017/06/13/globalfoundries-7nm-chips-coming-2018-euv-2019/
 
I know I have linked this before, but just to reiterate GlobalFoundries progress in 7nm and 5nm.

GLOBALFOUNDRIES on Track to Deliver Leading-Performance 7nm FinFET Technology
Jun 13, 2017
"New 7LP technology offers 40 percent performance boost over 14nm FinFET

Santa Clara, Calif., June 13, 2017 – GLOBALFOUNDRIES today announced the availability of its 7nm Leading-Performance (7LP) FinFET semiconductor technology, delivering a 40 percent generational performance boost to meet the needs of applications such as premium mobile processors, cloud servers and networking infrastructure. Design kits are available now, and the first customer products based on 7LP are expected to launch in the first half of 2018, with volume production ramping in the second half of 2018.

In September 2016, GF announced plans to develop its own 7nm FinFET technology leveraging the company’s unmatched heritage of manufacturing high-performance chips. Thanks to additional improvements at both the transistor and process levels, the 7LP technology is exceeding initial performance targets and expected to deliver greater than 40 percent more processing power and twice the area scaling than the previous 14nm FinFET technology. The technology is now ready for customer designs at the company’s leading-edge Fab 8 facility in Saratoga County, N.Y.

Our 7nm FinFET technology development is on track and we are seeing strong customer traction, with multiple product tapeouts planned in 2018,” said Gregg Bartlett, senior vice president of the CMOS Business Unit at GF. “And, while driving to commercialize 7nm, we are actively developing next-generation technologies at 5nm and beyond to ensure our customers have access to a world-class roadmap at the leading edge.

GF also continues to invest in research and development for next-generation technology nodes. In close collaboration with its partners IBM and Samsung, the company announced a 7nm test chip in 2015, followed by the recent announcement of the industry's first demonstration of a functioning 5nm chip using silicon nanosheet transistors. GF is exploring a range of new transistor architectures to enable its customers to deliver the next era of connected intelligence.

GF’s 7nm FinFET technology leverages the company’s volume manufacturing experience with its 14nm FinFET technology, which began production in early 2016 at Fab 8. Since then, the company has delivered “first-time-right” designs for a broad range of customers.

To accelerate the 7LP production ramp, GF is investing in new process equipment capabilities, including the addition of the first two EUV lithography tools in the second half of this year. The initial production ramp of 7LP will be based on an optical lithography approach, with migration to EUV lithography when the technology is ready for volume manufacturing.

Supporting Quotes

“We are very pleased with the leading-edge technology that GF is bringing with its advanced 7nm process technology. Our collaborative work with GF is focused on creating high-performance products that will drive more immersive and instinctive computing experiences.”

Mark Papermaster, CTO and senior vice president of technology and engineering, AMD.

“IBM is committed to meeting the rising demands of cognitive systems and cloud computing. GF’s leading performance in 7LP process technology, reflecting our joint Research collaboration, will allow IBM Power and Mainframe systems to push beyond limitations to provide high-performance computing solutions while aggressively pursuing 5nm to advance our leadership for years to come.”

Tom Rosamilia, Senior Vice President, IBM Systems

“While not the only important factor in a successful technology, transistor geometry still plays a part. This is an important fab milestone on the journey to 7nm volume production, demonstrating that GF’s process is mature enough to start working on real customer product designs. At the same time, the company is already making solid progress toward delivering 5nm and beyond. There are only a handful of companies in the world capable of driving this type of leading-edge innovation, and GF is clearly staking its claim as a member of this elite group.”

Patrick Moorhead, President & Principal Analyst, Moor Insights & Strategy

"GF continues to demonstrate America's leadership in advanced technology. If they continue this progress on 7nm, GF will be the first company to leapfrog a full node. Everyone that’s tried it in the past has failed well before this point in the process. It’s a completely new strategic approach for extracting value from Moore’s Law. By biting the bullet and skipping 10nm, GF opened up the technical bandwidth to attack 7nm head-on. Others have been dividing their resources and going for half- or even quarter-nodes."

Dan Hutcheson, CEO and Chairman of VLSI Research

About GF:

GLOBALFOUNDRIES is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GLOBALFOUNDRIES makes possible the technologies and systems that transform industries and give customers the power to shape their markets. GLOBALFOUNDRIES is owned by Mubadala Development Company. For more information, visit http://www.globalfoundries.com.

Contacts:

Erica McGill
GF
(518) 795-4250
erica.mcgill@globalfoundries.com"

https://www.globalfoundries.com/news-events/press-releases/globalfoundries-track-deliver-leading-performance-7nm-finfet-technology

They appear to be on track from their own statements for 7nm in 2018.
 


"You said that because an authority thinks something, it must therefore be true"

I didn't mention Kanter because he is a well-known expert in the industry (just meet any AMD engineer and ask him about Kanter), but because I know he got the correct value for the HD cell for Intel 14nm from the same source I got it: Intel.

As mentioned above Scott was wrong about key parameter for Intel 14nm, TSMC 7nm, and SS 7nm. I don't care how much authority he is supposed to have. He was wrong. He is also notorious by using a wrong 'standard node' equation that he adjusted to his beliefs. He has re-adjusted the standard node equation again. Using his former equation, Intel 10nm was a bit smaller than both Glofo and TSMC 7nm, using the new equation the inverse is true.

He has changed the definition for Intel 10nm from 8.0 to 8.3. He has changed the definition for TSMC 7nm from 9.0 to 7.9. He has changed the definition for Glofo 7nm from 8.8 to 7.8. Note that the physical parameters of the nodes of the different foundries have not changed, simply Scott has changed the "label" that he applies to the nodes.





It says:

«[:juanrga] Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.»





They are simply repeating the press release from Globalfoundries. Nothing more. I have the original doc from Glofo.



It sounds exactly the same than former several dozens of official press releases made By Glofo. And we know from experience that what Glofo promises and that Glofo delivers are two completely different things. All Globalfoundries nodes I have studied (45nm, 32nm, 28nm, 20nm, 14nm, 12nm, 10nm,...) have failed to meet the performance claims and have been either delayed or directly canceled.

Giving a detailed discussion of the history of Glofo claims and promises would require several long posts. I will focus on recent Globalfoundries claims about 14nm. According to Globafoundries its in-house 14XM node was going to be the best thing since sliced bread (leadership in the industry), and the node was going to be ready for 2014, with 10nm following in 2015

glofo-roadmap.png

finfet_image_2.png

GlobalFoundries_14XM_FinFET_3D_Transistors_14.jpg


What happened? It happened that both 14XM and 10XM nodes failed to match claims made on slides and were canceled. Then Glofo had to license 14LP from Samsung, and despite receiving a fully developed and tested node IP, still Glofo failed to meet Apple requirements (which forced Apple to cancel orders on Glofo and port the chips to TSMC 16nm). After further delays AMD started using the 14LPP production lines, whereas IBM avoided that as the plague (IBM uses 14HP), and Glofo developed a second 10nm node, the 10LP.

Again Glofo gave us of promises and slides about how good the new 10nm node was going to be.... until this got canceled as well

https://www.kitguru.net/components/anton-shilov/globalfoundries-designs-7nm-and-10nm-process-technologies-in-house/
https://www.eteknix.com/globalfoundries-bypasses-10nm-7nm/

So when Glofo makes performance claims about 7nm I take them with an amount of salt of the size of the Everest, and when they claim "2018 availability" I translate that to personally expecting that AMD could have access in second half 2019 more or less, if the Glofo historical record means anything.
 
So haven't been following toms lately due to it not being as open as other forum sites but what should we expect from Zen+?

I know its being made on 14nm+ not 14nm is there going to be any architecture improvements? Isn't parts of the SOC 45nm vs 14nm can we expect better improvements from that?

Improved memory controller be nice, same with some tweaks to the infinity fabric and it would be nice to see them go with a wider core but i don't expect that to 7nm.

Of course higher clock speeds be nice too as coffee lake is coming
 


Zen+ was renamed to Zen2. What will be released on 14nm+ next year is Zen.

5444308a-97e7-4221-a84a-0c7031a6579f.jpg

AMD-Raven-Ridge-APU-Specs-and-AMD-Pinnacle-Ridge-CPU-Specs.png


Pinnacle Ridge is a Richland-like version of Summit Ridge: i.e. all the same but slightly higher clocks from a more mature process node: 14nm+
 
You provided no evidence to sustain your claim: "Glofo '7nm' is in reality a 14nm node and worse than Intel '10nm' or TSMC '10nm'."
You just dismiss sources that claim the opposite, with the argument they are "preliminary data". I think your "preliminary data" has even less credibility.
Cheers.

 


I have backed up my claims with actual data and links like this

https://semiaccurate.com/2016/09/26/globalfoundries-7nm-process-isnt-even-close-name/

Saying that I am not giving evidence is false. Another thing is you don't want to accept my claims.

I just dismiss sources that I know are wrong, You quoted an article from Scott, which I know has a good amount of wrong data. And I said what data is wrong. That is all.
 
7nm process is essential for semi industry: Q&A with Globalfoundries CTO Gary Patton
Josephine Lien , Taipei; Steve Shen, DIGITIMES [Monday 7 November 2016]

Gary Patton, a 30-year veteran in the semiconductor industry, joined Globalfoundries as CTO in July 2015. He now shoulders the responsibility of building up the foundry house's 7nm manufacturing technology. Patton's task includes the mapping of a clear-cut development strategy for Globalfoundries following its acquisition of IMB's microelectronics business.

Patton outlined his plans for Globalfoundries, and shared his insights into the future of the semiconductor industry with Digitimes during an exclusive interview recently.

Q: What changes have come to Globalfoundries since its acquisition of IBM's microelectronics unit?

A: I used to serve at IBM for eight years and I assumed the post as chief technology officer at Globalfoundries in July 2015. I felt that our CEO Sanjay Jha had done a lot of changes in the past two and a half years, and with the adding of IBM's differentiated 45/30/22/14 nm process nodes, we have continued to sharpen our algorithm technologies for use in servers, which is essential to the future development of the semiconductor industry. I believe that the integration between the two sides will give Globalfoundries a clearer blueprint for technology development.

Judging from the industrial development in the computer, networking and handset sectors, although the market seems to have reached the point of saturation, I think the 5G industry, as well as mobile computing, IoT and automotive electronics will be the growth drivers for the next decade, particularly 5G products and datacenters which need support of high-performance computing. These industries will be the major focus of the semiconductor industry in the future.

Q: Can you talk about the roadmaps for FinFET and FD-SOI technologies, as Globalfoundries seems to have been approaching these two technologies parallelly?

A: Our FinFET process is divided into two generations, including 14 nm and 7 nm. We cooperated with Samsung Electronics in the 14nm process previously, but we have decided to choose a different approach for the 7nm technology and, additionally, the IBM deal has significantly enhanced our resources and development capabilities allowing us to develop the 7nm process in-house.

We also have decided to jump from 14nm to 7nm directly, while skipping the 10nm process because we believe that 10nm will help not much to improve power consumption and costs for clients; the 10nm node is more like a semi-generation process, similar to the previous the 20nm technology, which could not meet clients' requirements.

Additionally, we have received feedbacks from a number of clients indicating that they need the 7nm products urgently, and therefore, we decided to inject our technology resources into developing the 7nm process. I personally will lead the R&D team, which will include the existing staff of 200 from Globalfoundries and another 500 from IBM. The R&D projects will be carried out mainly in Albany, and some of our R&D personnel in Malta will also join the efforts.

According to our internal roadmap, the 7nm process is expected to enter volume production in the first half of 2018 with initial clients including IBM and AMD. The 7nm process has a number of advantages, including multi-core, high-speed I/O capabilities, reducing power consumption by 60%, upgrading performance by 30%, cutting costs by 30%, doubling the yield rate per wafer, while providing 2.5D/3D packaging services.

Q: Why is there no plan to introduce extreme-ultraviolet (EUV) technology at the 7nm process?

A: The EUV technology is expected to become mature in 2019, but our major clients need the 7nm products to be in mass production in early 2018.Therefore we still continue to use the current optical technology, instead of using the EUV technology.

Samsung's decision to introduce in advance the EUV technology into its 7nm process means that Globalfoundries and Samsung are approaching different technologies for the development of the 7nm node. But we do not know the situations at the Korea company.

Q: What is your intention to develop FD-SOI technology in addition to FinFET process?

A: FinFET is a very good technology but also relatively complex and costly because it needs two to four more extra steps in the multiple-exposure process. But some clients do not need products in such a performance level; particularly some small and medium IC design houses cannot afford the mask development cost for the FinFET process. For clients, mostly IoT device vendors, who are cost sensitive but also want to achieve a balance in performance, then the FD-SOI technology will be the most appropriate choice for them.

We already have two generations of roadmap for the FD-SOI technology, with the first one being the 22FDX; its process design kit (PDK) 0.5 version was completed in the second quarter of 2016 and we have already approached 50 potential clients. The 22FDX process is expected to begin risk trial production in the fourth quarter of 2016 and enter volume production in the first quarter of 2017.

The performance of the 22FDX chips is comparable to that of 28 nm products, but its power consumption is 70% less than that of the 28nm HKMG process. Additionally, a single 22FDX chip can be integrated with RF functionality. These features make the 22FDX process ideal for IoT devices.

Furthermore, the 22FDX process will be incorporated with the embedded MRAM technology from the memory provider Everspin Technologies; the reason to adopt the embedded MRAM technology at the 22nm process is because the embedded flash technology will encounter some bottlenecks from the 28 nm process onwards. We will also use the embedded MRAM technology in the FinFET process and also the 12FD-SOI process.

In addition, we have also begun to develop the second generation FD-SOI technology, namely 12FDX, which is scheduled to enter commercial production in 2019. This roadmap clearly indicates that we are picking up the 22/12 nm FD-SOI processes rather than the 20/10 nm ones, simply to reduce the mask exposure cost.

The 12FDX chips can reduce power consumption by 50% as compared to 16/14 nm FinFET chips and lower the mask cost by 40% as compared to 10nm FinFET process.

Our IC-designing clients in China are keen to adopt the FD-SOI technology, and we believe that Globalfoundries will be the core supplier of the FD-SOI technology in the global market in the future.

Q: Can you talk about your ecosystem which is similar to that the OIP (Open Innovation Platform) of TSMC?

A: Our ecosystem is called FDXcelerator, which is designed to shorten the time to market for products and our partners in the system include Cadence, Synaptics, Verisilicon, Invecas, Encore Semi, among others.

Q: How do you view the competition with rival companies including TSMC, Samsung and Intel?

A: As the global semiconductor industry moves into the 7nm process, there are only four companies that can offer related products, Globalfoundries, TSMC, Samsung and Intel, of which two are pure-play foundries. We value much the 7nm process believing that this process will be a very important and long-living technology for the semiconductor industry; we have already secured a number of clients and we have great confidence in the 7nm process race.

This was November 7th 2016, and is still inline with most recent statements GlobalFoundries has made with it's projections of it's internal road map for 7nm, and an addition of extra performance beyond the 30% noted. This isn't the same old GlobalFoundries after the acquisition of IBM's microelectronics unit.

http://www.digitimes.com/news/a20161102PD203.html
 


Thanks so basically just a new stepping so probably 200-300mhz more clock speed. That won't be enough to take on coffee lake at current prices.

I said it a year ago all Intel had to do is move everything down a line and it seems like that's what's happening.
 


Lol, The article you post is even more speculative than anything posted so far. I don't see any data there (not even preliminary), just pure speculation. I won't even waste my time pointing out where the author is making suppositions and speculations because they are everywhere. One thing is true GF 7nm is not a true 7nm node, but we all already know that.

I've provided real data. Even if some of it is preliminary some is real contrasted data.
For instance HD SRAM cell size, is based on real published data.
(1) intel 0.0312 µm²
(2) TSMC 0,027 µm²


Sources:
(1) intel has published plenty of slides showing this data
(2) wikichip and Jones claim the same values, because it's real data and not speculation.
TSMC published a paper in 2016 IEEE International Electron Devices Meeting (IEDM) title is self explanatory:
"A 7nm CMOS platform technology featuring 4th generation FinFET transistors with a 0.027um2 high density 6-T SRAM cell for mobile SoC applications"
http://ieeexplore.ieee.org/document/7838333/
 

This sounds the same than the hundred of interviews and press releases given by Glofo for 45nm, 32nm, 28nm, 20nm, 14nm, 12nm, 10nm... The problem as I reported before, and as sites sometimes mention, is the historic record of Glofo. A resume from kitguru:

The company had issues with its 32nm SOI process technology, it was late with 28nm node, it cancelled 28nm FDSOI and it was going to be late-to-market with its 14nm-XM process. In a bid to catch up and potentially gain new customers, GlobalFoundries licensed 14nm LPE [low-power early] and 14nm LPP [low-power plus] technologies from Samsung Electronics.

Both 14XM and 10XM were canceled. Glofo had issues with 14LPP and lost Apple business. Then announced new 10nm and 7nm, Then canceled 10nm...

Glofo continues with the same hype and claims about FD-SOI than since before the Bulldozer era. With each new SOI-based node was an imminent "breakthrough" in the industry. Trololo! I did spend considerable time then to explain why FD-SOI doesn't scale well and why 95% of volume production for the total foundries was moving away from SOI.

As TSMC mentions: "FD-SOI will always be the technology of the future" . TSMC just announced 22PL, which will kill Glofo 22FDX pretensions (again).

He mentions the acquisition of IBM foundries. He forgot to mention that IBM had to pay Glofo as part of the acquisition. He also forgot to mention that IBM had to 'sell' the foundries because they were an economic disaster and couldn't be sustained in time by the company. He also mentions how no one else in the industry was interested in the foundry tech, and finally 'acquired' by Glofo.

So they can continue selling hype and fantasies as they have done always. Do I have to recall again how Glofo promised us 10nm in 2015, 😀



The article I mentioned is not speculative, because it is based in information disclosed directly by Globalfoundries. Moreover, I already explained in three or four occasions, and using equations, the claims made in the article. Why do I have to repeat it one time more?

You post Intel and TSMC SRAM densities, but my complains are about Glofo. Also SRAM densities don't tell the whole history.

At IEDM late last year, Samsung showed 7nm designs sporting FinFETs with 44-48nm contacted polysilicon pitch and 36nm metal pitch. In March, Intel said its 10nm process now in production supports 36nm minimum metal pitches, 34nm fin pitches and 54nm gate pitches and has a density of 100.8 million transistors/mm2.

“We’re not advertising what our pitches are, we are just saying we have a very competitive base 7nm offering,” said Patton.

The pitches for 7nm must be soooo damm god, that Glofo is hiding them from public domain, to not leave rest of foundries without customers. <---- SARCASM.

And the comments sections of the article also deserves a look

TSMC has and will continue to ram the Globalfoundries face into the pavement. As a matter of fact, I just read that Qualcomm has switched from Samsung to TSMC at the 7nm node. Samsung foundry is going to be in desperate condition after that. Time is rapidly running out on the glofo. Just go read the glassdoor reviews for that sewer. I was reading there that the 7nm was a complete fantasy. But I'd really be interested to know about who has actually made the biggest mistake of their life​ to trust the glofo disaster at the 7nm node.
 


Trinity --> Richland was 3.8/4.2 GHz --> 4.1/4.4 GHz. I think your idea of expecting similar improvements is good.

The i7-7800X is usually faster than the R7-1800X, and the new i7-8700k is faster than the 7800X.
 

Corrected for you 😉
49816_02_intel-teases-ice-lake-tiger-family-10nm-2018-2019_full.jpg



Glofo SRAM density has been confirmed by several sources. All them show 0.0269 µm² and 0.027 µm² (probably the last is a rounding of the first)
https://www.semiwiki.com/forum/content/6879-exclusive-globalfoundries-discloses-7nm-process-detail.html
Initial customer products on 7LP are expected to launch in the first half of 2018 with volume production in the second half of 2018.

The 7LP process will be produced with optical lithography and what we now know is the Contacted Poly Pitch (CPP) will be 56nm and the Minimum Metal Pitch (MMP) will be 40nm produced with Self-Aligned Double Patterning (SADP). A 6-track cell will be offered with a cell height of 240nm. The high density 6T SRAM cell size is 0.0269 microns squared.
https://en.wikichip.org/wiki/7_nm_lithography_process

http://electroiq.com/chipworks_real_chips_blog/2017/04/10/intel-unveils-more-10nm-details/
The TSMC and GF/IBM/Samsung 7-nm cells announced at IEDM, presumably 1:1:1 cells, were 0.027 µm2
And, yes, SRAM size is not everything, but a process that you claim to be 14 nm is getting more density that intel's super-advanced-state-of-the-art 10 nm means either:
a) Intel engineers are incompetent, and have no clue of designing SRAM cells
b) Your claim is wrong and GF 7 nm is not far from intel's 10 nm

Disclosure: I personally know several Intel engineers and researchers and all of them are extremely bright minds and very competent.
 


I believe the initial claim by Lisa Su was a performance increase of 15%. Not sure if that will come by way of IPC or frequency or a combination of both.
 


Ooh, tell me again how incompetent intel's "(Silicon Valley)" engineers are, I want to know more about it. Specially after been the world's largest and highest valued semiconductor chip makers based on revenue, Intel created the world's first commercial microprocessor chip, they are the inventors of the x86 series of microprocessors and after Intel Builds World's First One Square Micron SRAM Cell,. Intel engineers Marcian Hoff, Federico Faggin, Stanley Mazor and Masatoshi Shima invented Intel's first microprocessor and it was introduced to the mass market on November 15, 1971. Because of intel you have a PC and because of them you are able to use your computer to write nonsense comments.

Yes they have a history of been really dumb(sarcasm) 😉
 


aldaia did say, "Disclosure: I personally know several Intel engineers and researchers and all of them are extremely bright minds and very competent."

aldaia argument is that both foundries have over promised before, but all evidence shows that GoFlo will have the leading process density with its 7nm technology. Juanrga makes assumptions based on commentary and use of his own formulations, which contradict other sources claiming very different results. Juanrga believes his statements should be believed over anyone else bases on his formulation from one article. Aldaia and I do not agree with his assessments, and choose to believe other professionals who we believe to be more accurate than Juanrga.
 


The slide says RESEARCH on the 10nm node starts on 2015. It doesn't say that 10nm is released for volume production in 2015. The original slide reports the pipeline of work at Intel with the three pipeline stages: RESEARCH --> DEVELOPMENT --> MANUFACTURING. The Internet guy that edited the slide, adding the red crosses and other years, is seriously misguided.

Unlike Glofo, Intel did never promise 10nm for 2015. Also Glofo is not well-known for delaying or having problems with one node. Glofo got fame in the industry for failing on each one of the nodes that tried. All nodes either were delayed and then failing to match marketing promises or were directly canceled...

Your electroiq.com quote saying that TSMC and GF/IBM/Samsung have the same density is wrong. TSMC has a different process tech node with different density. And Samsung node is also different. The only common node is GF/IBM, but it is wrong to refer to it as "GF/IBM" only because IBM foundries no longer exist.

However, a part of the electroiq.com link is interesting. Pay attention to this part

The SRAM cells are scaled by a factor of ~0.6, so that the low-voltage 1:2:1 (fins in Pull-Up😛ass-Gate😛ull-Down transistors) cell goes from ~0.059 µm2 to ~0.037 µm2, and the high-density 1:1:1 cell shrinks from ~0.050 µm2 to ~0.031 µm2.

It gives "~0.059" as low-voltage cell and "~0.050" as high-density cell for Intel 14nm. Those are just the values that I gave you in a former post

http://www.tomshardware.co.uk/forum/id-3341285/amd-naples-server-cpu-info-rumours/page-7.html#20086365

when I said that your source, Scott Jones, was giving wrong values for the high-density cell, and thus reducing the density gap of Intel 14nm with rest of foundries.
 


aldaia just gave a link to an article that already confirmed one of my points and disproved the information given by those "other professionals" that both of you trust.. I said that Scott Jones was confounding the high-density and the low-voltage cells on Intel14nm.

http://www.tomshardware.co.uk/forum/id-3341285/amd-naples-server-cpu-info-rumours/page-7.html#20086365

Scott Jones reports a high-density cell 0.0588μm², but the correct value is the one that I gave: 0.0499 μm². Now one of the links found by aldaia, confirms that I was right, and your expert was wrong. The expert is also wrong in the other things that I have mentioned in former posts.
 


Both jdwii and me are discusing Pinnacle Ridge which launches next year. The IPC is the same because it uses Zen cores, and 15% higher frequency on 14nm+ is difficult to accept. As jdwii said, we would expect 200--300MHz extra. This accounts to ~5% higher clocks than current Summit Ridge.
 
lol, juanrga the data is out there, but you just want to look to another side and ignore it. GF 7nm data shows it's very very similar to TSMC's 7nm.
GF 7LP dimensions are pretty much identical to TSMC 7FF but a year later.
CPP 56 nm
MMP 40 nm
As well as 6-track cells (I have the specifications just in front of me)

Cheers.
 
I just received and email from Scott Jones, and he responds:

Scott Jones <-------------->
5:42 PM (2 hours ago)

to me
Hi John

This article has the actual numbers from Global Foundries and Intel as they were directly disclosed to me by the two companies: https://www.semiwiki.com/forum/content/6879-exclusive-globalfoundries-discloses-7nm-process-detail.html

Intel is denser if you don't include tracks but since standard cells include tracks in reality Global Foundries is slightly denser.

The latest standard node analysis form me includes this data and is correct based on the best information available today.

Best regards

Scott

Sent from my iPad

Edit: Blanked out email address
 


I can't find any details on the subject to make a guess yet. Looking at present day Zen core 2-300MHz looks too generous, but you expect them to do something to improve the performance.
 


I have to agree with that though. Improving the node and not doing any uArch improvements, won't yield impressive gains. A 200Mhz increase seems about right for a "speed bump" due to process improvements with XFR maybe being a tad more.

Zen 2 is not planned for 14nm nodes (IIRC, according to official slides), so Juan is right about that. I'd really love to see Zen 1 rev 2 though, and with that we could see a small improvement and a couple much needed bug fixes in Zen 1 rev 1. No way to confirm nor deny it yet, I guess.

Cheers!
 


This doesn't add that wasn't discussed before:

(i) I can trust Intel data. I find difficult to accept Glofo data, because the long historic record of claims made by Glofo that turned out to be wrong. What makes it more suspicious is that other companies are sharing pitch values for their nodes, but Glofo refuses to give them, as mentioned in a former post:

At IEDM late last year, Samsung showed 7nm designs sporting FinFETs with 44-48nm contacted polysilicon pitch and 36nm metal pitch. In March, Intel said its 10nm process now in production supports 36nm minimum metal pitches, 34nm fin pitches and 54nm gate pitches and has a density of 100.8 million transistors/mm2.

“We’re not advertising what our pitches are, we are just saying we have a very competitive base 7nm offering,” said Patton.

(ii) Scott Jones took ASML formula and changed it to fit his beliefs. Using that formula he found that Intel process is denser. He didn't like that and then changed the equation by other he invented and applied it to get that Intel is less dense. Again this was mentioned before:

He has changed the definition for Intel 10nm from 8.0 to 8.3. He has changed the definition for TSMC 7nm from 9.0 to 7.9. He has changed the definition for Glofo 7nm from 8.8 to 7.8. Note that the physical parameters of the nodes of the different foundries have not changed, simply Scott has changed the "label" that he applies to the nodes.

(iii) You could have used the email to explain him that his claims about Intel 14nm are wrong. He used incorrect HD cell densities for Intel in his comparison with TSMC 16nm and GF/SS 14nm. The correct values for Intel 14nm are

High-Density SRAM: 0.0499 μm².
Low-Voltage SRAM: 0.0588 μm².
High-Performance SRAM: 0.0706 μm².

Say him that he confounded the high-density and low-voltage densities. 😉

I guess I am leaving this topic as well, because it is going in circles.
 


Exactly, there is no disclosed info about Glofo 14nm+. We only can take a look to former history, when Glofo matured the 32nm process node for Piledriver. Richland got 200--300MHz above Trinity clocks. Richland was released in 2013, Trinity in 2012. Or when Glofo matured the 28nm process node for Steamroller. The A10-7890K (released in 2016) got 200MHz extra compared to the A10-7870K (released in 2015).

Therefore one year maturing gives about 200 or 300MHz extra for Glofo. Note Intel is also getting similar improvements per year. Skylake 4.0/4.2GHz (14nm) --> Kabylake 4.2/4.5GHz (14nm+) --> CoffeLake ---/4.7GHz (14nm++).

We can start the speculation awaiting similar improvements for Zen clocks on Pinnacle Ridge, after maturing the 14LPP node during one year: 2017 --> 2018.

Summit Ridge 1800X 3.6/4.0GHz ----> Pinnacle Ridge 1850X? 3.9/4.2GHz?

And we can adjust this speculation when more data was available.
 
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