AMD's Future Chips & SoC's: News, Info & Rumours.

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Hey guy's been away just catching up... Think your wrong about that mate, glofo's 7nm is in reality 9.2 or 9.8nm I think... it's not 14nm as stated by you here.. Intel are gonna loose their process lead when it happens.

Found this:
https://www.semiwiki.com/forum/content/6713-14nm-16nm-10nm-7nm-what-we-know-now.html

"Intel's 10nm is more similar to TSMC and GF/SS 7nm processes than to the competing 10nm processes. Even though Intel has a significant density advantage at each node the forthcoming 7nm foundry process will likely pass Intel for process density and maintain that yield for at least a few years."
 


It's not the only reason they turned to MCM (probly the main one)...

But I think even Intel will have to take a similar approach in the future to compete with AMD as computing goes wide. Everything is being designed for more an more cores. Intel will likely have no choice to take a similar approach. Especially after the node shrink happens. There huge monolithic dies will be too expensive and give less yield results increasing cost and reducing numbers.

This is already happening an the reason why their higher core skylake chips are not available yet.
 
AMD EPYC™ Momentum Grows with Datacenter Commitments from Tencent and JD.com, New Product Details from Sugon and Lenovo

Cloud Datacenters Choose EPYC
"Tencent Cloud provides public services to benefit everyone. With our commitment to offer users with more choice and a more convenient user experience, Tencent Cloud is continuously seeking more cores, more I/O interfaces, more secure hardware features and improved total cost of ownership for server hardware products," said Sage Zou, senior director of Tencent Cloud. "To continue as a leading provider of high-performance and high-value cloud services, Tencent needs to adopt the most advanced infrastructure and the chip industry's latest achievements. By the end of this year, Tencent Cloud will launch AMD EPYC-based 2P cloud servers, with up to 64 processor cores and superior single system computing capability, to provide the industry with a more diverse portfolio of cloud products and services.”
“China Internet and e-commerce companies need more compute cores and higher memory bandwidth. We saw AMD EPYC processors have up to 32 cores, providing competitive advantage over current 2P server systems, and the eight memory channels enable greater memory bandwidth, which are believed to better match domestic customers’ requirements," said Andrew Wang, technology leader of hardware system department at JD.com. “AMD EPYC will help JD.com improve the total cost of ownership (TCO) of our server systems. JD.com will collaborate with AMD on Big Data, AI and Cloud Services based on AMD EPYC in the future.”

http://ir.amd.com/phoenix.zhtml?c=74093&p=RssLanding&cat=news&id=2295143&ref=il
 


Do you really believe that AMD has to purchase its own cards?

AMD not only use Intel on stands, it also uses internally when preparing marketing slides

NPCDkrs.jpg


another example

tr8u3gjs6eez.jpg

 


I demonstrated that Glofo 7nm is in reality a true 14nm node. I repeated the demonstration about three times. I linked several times to Charlie's article saying the same than me.

I have also reviewed that semiwiki article before. I have reported several wrong parameters Scott Jones is using, I have given the correct parameters, criticized his modification of the ASML formula, and reported some other incorrect claims made by him and his partner writer at semiwki. It is all in this thread only one or two pages ago.



Intel already developed an multidie technology named EMIB or something as that. This new technology doesn't have the deficiencies and limitations of the older MCM approach. Therefore Intel will be moving from a monolithic die approach when a suitable alternative was mature enough to be used commercially. Whereas AMD is using the MCM approach today because it is cheaper for AMD than designing a monolithic die.
 


Ok... And what is the point you're trying to make here? Any more depth than "look, AMD bad! Using Intel, hurrdurr!".

Remember Intel nor nVidia are clean of dirt in their own official presentations either.

Plus, yes, when AMD, nVidia or Intel hire an external company to do a showcase, that company has to resource their own hardware.



/facepalm

So you're saying they should have spent a huge amount of money (they don't have, I'd say) on doing heavy R&D on a technology just to create a multi-die packaging that would allow them to skip an already developed and established (though still hard to do) packaging method and still be competitive?

Do you know how economically senseless it would be to do so? Intel can do it, because they have the cash to bleed (evidenced by their mobile failed attempts and other things) without getting hit hard. AMD can't just spawn miraculously a new technology and a new uArch with their resources.



It's interesting how in single core, the "slower" Zen core is actually faster than the Skylake-U contender. I would imagine by that the Zen CPU has a higher turbo or something?

Cheers!
 


Those threaded scores are downright bad when you consider the chip is being detected as 4/8, versus the 2/4 for the i5. Either there's a serious firmware problem, or the CPU isn't being detected properly (Core/Thread count).
 


What about "Hey look, not even AMD believes the stuff that some guys are posting on forums".



No. I am saying two things. The first that people would stop posting that the MCM approach in Zen processors is "innovative", when it has been in use for decades, and even used in Bulldozer processors. The second is that people would stop posting that MCM is the best approach, from a technological point of view, when it is only the cheaper approach.



If the word "INVALID" in big font wasn't enough... the scores show a 2C/4T Skylake beating a 4C/8T chip on MT. I would take those numbers with a huge amount of salt.
 


That still doesn't explain it. At least you still have me lost on what you're trying to get at there.



The "innovation" is around IF in the MCM package for the consumer market. For all the crap Intel gave AMD in their marketing slides that made the rounds, they're pursuing a similar approach and have used the same "cheap" and "not innovative" approach with Core2Quads and Pentium Ds just because they could at the time.

Car have been around for more than 100 years now, but you still can innovate using the same platforms. I would imagine when we toss around the acronysm "MCM" we're all eating a lot of what goes under the actual process of packaging the stuff in them that has changed over the years. Are you going to say the MCM packaging current ThreadRippers use is the exact same one Core2Quads used back in ~2006?



I will concede. The bench scores do look fishy.

Cheers!
 


What about reading what the tech site wrote and what I replied?



I will say it again: the article's claim that AMD "turned to a MCM architecture" with Zen is incorrect. AMD has been using MCM since Bulldozer at least. About Infinity Fabric, I have already mentioned in multiple occasions why it is only an evolution of existing technology not anything really "innovative". Feel free to disagree, of course.
 


So your now in agreement with me then ?
Being a cheaper solution is not the only reason to take this approach. As Intel is now adopting it too.. They have no choice it seems.

Forward thinking by AMD for sure.. An Intel now seem to be playing catch up on a Muti Die Approach.. I hope EMIB show's some better numbers than MESH did when they dusted it off an implemented it.

Intel are developing "Heterogeneous Compute" with this EMIB approach...

Even the term "Heterogeneous Compute" was coined by AMD.
This is something AMD has been developing for years now, the MCM approach and their Infinity Fabric are all geared towards Heterogeneous Compute... Intel are playing catch up with this also.

I suppose imitation is the highest form of flattery after all !
 


https://hothardware.com/news/amd-confirms-7nm-tape-out-2h-2017-navi-zen-2

Zen2 and Navi tape out on 7nm this year...
 


Interesting information. So they're using 14nm+ as a stopgap (if anything) while they prepare Zen2 out the fab in 7nm.

And I think from tape out to production is 1 year at least. I'm going with the fact BD was taped out 2H 2010 and it was launched on 2H 2011. So a 2H 2018 launch is absolutely feasible.

Cheers!
 
I went over one possibility, with Sunzi's art of war comment, and the product release road maps for 7nm falling next year for Server and Navi. How does 14+ fall into the efficiency model they demonstrated this year with the server being the sum of 8 core parts with the remains going to R5 and R3 lines.
http://www.tomshardware.com/forum/id-3341285/amd-naples-server-cpu-info-rumours/page-8.html#20100154

AMD-FAD-Zen-Core-Roadmap.png

AMD-Eypc-Roadmap-2017.png

AMDGPU.jpg



Edit: Can anyone find any information on the 14+ tape out? Or any mention of a release date? I would think we should hear something about it within the next few months.
 


(i) She didn't mention Zen2 still less Navi.

(ii) Zen tapped out in late 2015 and was launched in early 2017.
 
@goldstone

It looks like it's going to be Glofo's version of Samsungs faster 14LPX process...

"14+ should be 14LPX, which is Samsung's High Performance version of 14nm... Samsung's nodes always have three iterations, they go 14LPE (Low Power Early), 14LPP (Low Power Plus, what Zen & Vega & Polaris are on now), and then 14LPX (Low Power X which stands for Extra or Extreme not sure).
Think beefier transistors that should allow higher clocks without sacrificing density, so 14LPX should be closer to Intel's 14nm in power and frequency, but Intel probably has a slight density lead still."
It's discussed here:
https://www.reddit.com/r/Amd/comments/6c3567/has_anyone_elaborated_on_14nm_stated_in_the_slide/

This article reckons early next year (actually most do). It should have better clock speeds an better power efficiency... Sounds great ! A lot of sites an forums believe early next year. It's supposed to be a tock (zen+) an then a tick (zen2) die shrink... so it would have to be soon enough. Especially with mounting pressure from Intel's Coffee Lake.
We Shall see I guess:
http://digiworthy.com/2017/05/22/amd-ryzen-refresh-series-zen-2/
 


Keep in mind that is an Iris version. I find it more interesting in the 7700K vs the RyZen LV sample, since you can see how the difference is even on different wattages. It's obvious the extra memory on-die would boost any iGPU performance. I wish there would be an APU with HMB2 in it. Le sigh.

Cheers!
 


zen+ = Zen2

Zen2 is what AMD formely named Zen+.

The more I think about this, the more I believe this is a wise marketing move from AMD. People is now in every forum confused about Zen, Zen+, and Zen2.

Also so far as I know Samsung has not licensed any other process node to Glofo. So far as I know Glofo "14nm+" is another marketing name for the same 14LPP used in Zen.
 
AMD’s Epyc pummels Intel’s new Xeon-W workstation CPUs
It isn’t a fair fight, Intel didn’t show up but still charges more
Aug 29, 2017 by Charlie Demerjian
"Intel is being pummeled by AMD’s Epyc and today’s Xeon-W launch shows their desperation. Worse yet for Intel, they can’t react on pricing without destroying their core Xeon market.

As SemiAccurate has been saying for months, Intel is in a self-made bind. They have been squeezing locked-in customers harder and harder every generation because, well, the customers had no place to go. Note the past tense in the previous sentence, AMD’s Epyc launch made that lock-in a moot point last June. Today Intel launches the Xeon-W workstation parts and they don’t compare well to the competition.

So what is Intel launching in the -W Xeons? Take the normal Xeon lineup and subtract a few SKUs et voila, workstation parts. That is a bit unfair, significant work was done to redo the box art to add a -W to the mix and put the word workstation on too, it is longer than server so many marketing dollars were spent. Luckily for humanity the job was accomplished with minimal loss of life. The 2S workstation lineup looks like this."

Intel_2S_Xeon-W_pricing-617x307.jpg


Xeon-SP minus a few items
"You may notice the Silver and Bronze tiers of Xeons are gone, as are the -M SKUs. This leaves the workstation parts crippled, you can’t get more than 768GB per socket on parts meant for heavy memory intensive tasks like CAD, FEA, and modeling large data sets. For some reason Intel neglected to put this fact into their slides on the workstation parts."

AMD_EPYC_Pricing_Details-617x307.jpg


AMD’s clean kill starts here
"AMD’s Epyc on the other hand can put up to 2TB in a single socket, 4TB with 256GB DIMMs versus Intel’s 756GB, an artificially enforced cap so DIMM side is irrelevant. Any guesses which is more attractive to the target market? More to the point the top 2S Epyc, the 32C 7601 costs $4200 and the 200MHz slower (base clock) 32C 7551 costs a mere $3400. For a little more money you can get an 18C Intel Xeon-W Gold 6154 for a mere $3661. So 14C less, higher base clocks, slightly higher turbo, and a crippled memory subsystem for your hard-earned dollars. If you want to step up to the still memory crippled Xeon 8180, it is a mere $10,009. Each. For 4C less.

Before you talk about single threaded performance, think about what you are saying. The workstation market is all about multi-threaded tasks, if it wasn’t you wouldn’t be buying a 1S or 2S high core count box, you would be searching out a rare consumer platform that supports ECC for the higher base clocks. Intel isn’t just out of line on price with the Xeon-Ws, they aren’t in the same game.

The second half of the Xeon-W launch today is the 1S Xeon-W lineup. If you take the woeful Skylake-X aka i9 lineup and fuse them off differently, you have the new Xeon-Ws. Like the infamous empty tables from the Sky-X launch, Intel is so proud of these new Xeon-Ws that they can’t put a price on them other than more expensive than their consumer brethren. Is it just me or is a company like Intel ‘launching’ multiple product lines in a row without complete specs or prices more than a bit embarrassing. I know AMD is running rings around Intel in marketing and PR but this is getting sad. Here are the 1S specs."

Intel_1S_Xeon-W_pricing-617x288.jpg


Sloppy or too embarrassing to print?
"There are a few things to note here. First take a look at AMD’s 1S Epyc pricing, specifically the 32C 7551P. It costs $2100 or a mere $101 more than the 28C Skylake-X for 14C more, 1.25TB more addressable memory, and no artificial fusings of bells and whistles. Any guesses which will be faster on workstation workloads? Now if you look at the price delta between Skylake-X and Xeon-W it is about $450 for the 10C models, the 14C and 18C prices are MIA. Any guesses why?

If you said Intel doesn’t want to be put in the position of admitting they are charging significantly more for a new product that runs about half the speed of their cheaper competition, you might be on to something. On the 2S side they already launched their pricing when AMD announced theirs, so officially they have plausible deniability even if they knew the pricing months beforehand. This time the AMD prices were out and the plausible deniability isn’t there so embarrassing blank pricing charts it is. With this lot in charge are there any guesses as to why AMD is beating Intel like a drum in OEM sales?

But things get worse for Intel on the workstation side. In addition to multi-threaded workloads that define this multi-core, multi-socket market, there is one other big difference between a high-end PC and a workstation, two if you count ECC. That is GPU attach rates which are usually above one for workstations. Intel crippled Skylake-X for PCI-E lanes, even the $999 10C i9-7900X only has 44 of the 48 PCIe3 lanes available, anything less has 28 tops. The Xeon-W line, same chip mind you, has 48 lanes on all SKUs top to bottom. For some reason that SemiAccurate can’t explain, the 8C Xeon-W 2145 costs $1,113, almost like Intel doesn’t want gamers to buy Xeons.

Once again this would be fine in isolation, Intel is known for soaking target markets until they bleed. Once again though we are not in isolation, since June AMD has had their Epyc 1S parts on the market. Each Epyc offers 128 PCIe3 lanes in 1S and due to the inter-socket configurations also has 128 net lanes in 2S form. In any case that is more than 2x what Intel can offer in 1S and 32 more than they can offer in 2S configurations.

As we mentioned before, workstations have a >1:1 GPU attach rate with many common workloads being bound by GPU performance. AMD has a multiple of what Intel can offer on GPUs per 1S and a useful two additional slots on a 2S machine. If you are GPU limited as many large markets are, chances are you are not CPU bound, the CPUs tend to be glorified I/O controllers. If you buy Intel CPUs you need to buy 2x Xeon-Ws for less supported GPUs than a single Epyc-P 1S device. It isn’t just a clean kill for AMD, Intel isn’t in the game and they can’t fix it for at least 3 years.

Overall Intel’s Xeon-W launch today shows exactly how deep a hole Intel is in. They are reacting to AMD’s every move but doing so late, ham-handedly, and with significantly inferior products at a significantly higher price. This is significant in case you didn’t catch it last sentence. With Epyc you get more cores, more performance per socket, more memory capacity, more PCIe lanes, and all for notably less money. Intel still wins, barely, on single threaded performance, something that has no place in the workstation market. In short Intel wins on nothing with the Xeon-W and SemiAccurate’s talks with large OEMs confirm this is reflected in sales figures. AMD wins this round, Intel didn’t even show up to fight.S|A"

https://semiaccurate.com/2017/08/29/amds-epyc-pummels-intels-new-xeon-w-workstation-cpus/
 
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