AMD's Future Chips & SoC's: News, Info & Rumours.

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I did confront him with your claims with the points of reference you made, and asked him if he would like to comment, and that was his response. Apparently he feels that the information he has( handed directly from the companies) is accurate in his version of the standard node. It is a wiki page and you would think that if it was terribly misleading someone else would have voiced their concerns. You also have to realize he isn't the only person working on this. It's a group of people with him.

GLOBALFOUNDRIES 7LP
"As Dan Nenni previously discussed in his GlobalFoundries 7nm and EUV Update! blog 7LP (Leading Performance) will offer a greater than 40% performance improvement relative to 14nm or greater than 60% lower power. Area scaling will be approximately 2x and the die cost reduction will be greater than 30%, with greater than 45% in target segments. Initial customer products on 7LP are expected to launch in the first half of 2018 with volume production in the second half of 2018.

The 7LP process will be produced with optical lithography and what we now know is the Contacted Poly Pitch (CPP) will be 56nm and the Minimum Metal Pitch (MMP) will be 40nm produced with Self-Aligned Double Patterning (SADP). A 6-track cell will be offered with a cell height of 240nm. The high density 6T SRAM cell size is 0.0269 microns squared. A 7LP+ process is also planned that will take advantage of EUV when it is ready to offer improved performance and density.

GLOBALFOUNDRIES is also in the unique position of providing an in-house ASIC platform FX-7 on their 7LP process. FX-7 provides a comprehensive suite of tailored interface IP including High Speed SerDes (60G, 112G), differentiated memory solutions including low-voltage SRAM, high-performance embedded TCAM, integrated DACs/ADCs, ARM processors, and advanced packaging options such as 2.5D/3D"

Juanrga when you look at these claims that appears to be fairly close to a full node shrink from their 14nm. Over 40% performance gains, and 60% lower power. Scaling will be approximately 2x and the die cost reduction will be greater than 30%, with greater than 45% in target segments suggest a close to full node shrink as well. A 6-track cell will be offered with a cell height of 240nm. The high density 6T SRAM cell size is 0.0269 microns squared. Honestly, Juanrga the data speaks for itself. If the data is accurate this is nearly a full node shrink from 14nm, and we will know for sure when 7nm actually comes out, and that looks like it is projected to be the first quarter of 2019. When you compare Ryzen to Intel in power draw and performance at 14nm not + or ++ this shows you that they are not very far apart at 14nm. It's says over 40% performance gains, with just 40% frequency over say 4GHz that is 5.6GHz, or 60% lower power will land a 39/57W TDP. Those processors are going to be beast!


Edit: I also, think AMD has an opportunity if GlobalFoundries comes through with full production 2nd half of 2018 for AMD to drop 7nm ontop of Intel's 10nm as I have been saying for the past year. And they appear to be on schedule.
"Given that the new AMD Ryzen architecture was launched on 14nm in Q1 2017, it should be reasonable to predict that AMD could refresh Ryzen on 7nm in the second half of 2018 putting AMD 7nm just six months behind Intel 10nm. I certainly hope this is the case because I really want to see how Intel PR spins that one!"
https://www.semiwiki.com/forum/content/6837-globalfoundries-7nm-euv-update.html
 
You know the more I think about it from a strategic point of view! If you were going to try and take on a bigger more powerful enemy as in the case between AMD and Intel. How would you go about it. Would you tell them out right that's what you are going to do? Would you let them know that they will have a better CPU? Considering the dirty underhanded tactics Intel has employed in the past you would have to be very secretive about it. This includes GlobalFoundries being secretive. AMD announces with Ryzen that they are just going to try and stay close to Intel with their CPUs. In hopes that Intel doesn't think much of it. And they didn't at first. A few months later after the release of Ryzen Intel spends over 100 million on 2 more ASML machines, and have ramped up production, and are now pushing out their product lines ahead of schedule! We will see in the months to come exactly what is going to happen, and it's a very exciting time for technology! In the end we all win as customers, and I really like the suspense of the David vs. Goliath story!
 
GlobalFoundries 7nm and EUV Update!
by Daniel Nenni
Published on 06-13-2017 05:00 AM
"Scott Jones and I had the opportunity to talk again with Gary Patton, GlobalFoundries CTO and SVP of R&D for a quick update on 7nm and EUV. Gary has been at GF for two years now with more than 500 other technologists from the IBM semiconductor acquisition. 7nm is the first IBM based process from GF (14nm was licensed from Samsung), it will also be the first time AMD has a process advantage over Intel."
19949d1497328342-gf-7nm-update-2017-jpg

“We are very pleased with the leading-edge technology that GF is bringing with its advanced 7nm process technology. Our collaborative work with GF is focused on creating high-performance products that will drive more immersive and instinctive computing experiences.” Mark Papermaster, CTO and senior vice president of technology and engineering, AMD.

"Scott Jones will be updating his 14nm 16nm 10nm and 7nm - What we know now blog with the latest specs from GF 7nm in the next week or so. One thing you will notice is that the GF 7nm and TSMC 7nm are much more similar than previously thought. GF however is leading with a high performance (LP equals Lead Performance in IBM speak) version of 7nm for AMD while TSMC is first with a low power version of 7nm for Apple, Qualcomm, MediaTek, and the other SoC vendors. The similarity between the TSMC and GF 7nm processes does open up the opportunity for GF to do some serious 2nd sourcing which is a critical component to the pure-play foundries business model, absolutely.

GF 7LP will be in volume production in the second half of 2018 and is expected to provide a greater than 40% improvement and 2x the area scaling over Samsung 14nm. According to Gary, EUV tools will be installed in the second half of 2017 with the hopes of inserting EUV into 7nm in 2019. My guess would be 2020 at the earliest but the point here is that EUV is not holding up 7nm for TSMC or GF and we should all be thankful for that."
19950d1497328376-gf-euv-update-2017-jpg

"Back to the AMD thing. Given that the new AMD Ryzen architecture was launched on 14nm in Q1 2017, it should be reasonable to predict that AMD could refresh Ryzen on 7nm in the second half of 2018 putting AMD 7nm just six months behind Intel 10nm. I certainly hope this is the case because I really want to see how Intel PR spins that one!"
https://www.semiwiki.com/forum/content/6837-globalfoundries-7nm-euv-update.html
 


That does start to sound a bit tin foil hat like haha but you might be on to something i mean they kept saying 40% improvement from excavator and we got 52%.

Not to mention even IF Intel's fabrication is better its not going to be as massive of a difference as it was with piledriver and intel's latest.

Ryzen right out of the gate isn't bad and its not even as wide as haswell from a core to core stand point and its about around haswell IPC. Things Amd needs to work on is making the core a bit more wide 4ALU+4AGU

Amd severally needs to improve cache latency and bandwidth to be honest as well

Since infinity fabric is tied to memory they need a memory controller that can easily support DDR4 3200mhz. As others would say perhaps they need to add better support for AVX2 as handbrake can use this under H.265 encoding which i mean is a big reason to even buy high-end core count CPUs to begin with, plus Ryzen is competing with processors that do have it and people in that market do use it.

I'll be pretty disappointed in Amd to the point of going back to Intel if all they do is add more cores to mainstream parts lol 8 is plenty for 3-5 years just focus on improving individual cores and the infinity fabric that connects them together.

 


It is Sunzi's art of war type of stuff! Lisa Su!

18. All warfare is based on deception.

19. Hence, when able to attack, we must seem unable; when using our forces, we must seem inactive; when we are near, we must make the enemy believe we are far away; when far away, we must make him believe we are near.

20. Hold out baits to entice the enemy. Feign disorder, and crush him.

21. If he is secure at all points, be prepared for him. If he is in superior strength, evade him.

22. If your opponent is of choleric temper, seek to irritate him. Pretend to be weak, that he may grow arrogant.

23. If he is taking his ease, give him no rest. If his forces are united, separate them.

24. Attack him where he is unprepared, appear where you are not expected.

25. These military devices, leading to victory, must not be divulged beforehand.
http://classics.mit.edu/Tzu/artwar.html

We can only hope they improve upon things they need too in order to stay competitive. My guess is that the two dummy blocks in the ThreadRipper package are no coincidence! ThreadRipper will be going to 32 cores! I think all of their product lines are going to be well positioned at 7nm!

Edit: Just to add if these are the tactics they are using, it is obviously working because it's convincing some people that 7nm isn't not going to be as good as Intel or TSMC's 10nm.
 


A real 14nm --> 7nm shrink would provide 4x scaling, not 2x scaling. Their '7nm' is just a marketing label, as demonstrated a hundred of times.



5.6GHz and the chip will melt unless using LN2. When companies talk about % gains they take the optimal regime of the node, not the limits. Thus 7nm will not provide 40% higher clocks on top of 4GHz, not even close!

The 60% power claim is at isofrequency, and again it is for the optimal regime. This means that 1800X, which has a real TDP of 128W, will have a TDP higher than 80W (because 60% doesn't apply around 4GHz), if and only if it is ported like it is to 7nm. However, AMD will use 7nm to increase core count and frequencies, and also microarchitectural changes, and thus the TDP will be so high as always.

Nenni's claim that "it should be reasonable to predict that AMD could refresh Ryzen on 7nm in the second half of 2018 putting AMD 7nm just six months behind Intel 10nm" is not only unreasonable, but wrong. There is no refresh of RyZen on 7nm next year. There is a refresh of RyZen on 14nm+ next year. But this 'knowledeable' people you keep quoting didn't even bother to check AMD roadmaps.

I am sad that the hype cycle has begun again, and I am reading nonsensical claims again. It seems we didn't learn anything since Bulldozer, even when the silly hype about Zen is still recent :pfff:




This conspiracy theory doesn't make any sense. First, those "dirty underhanded tactics" were carried up to the Court and Intel did pay to AMD the amount of money that AMD required plus extras. Second Glofo is not AMD. Glofo is a foundry and has to share information if want customers. Third, the reason why Glofo is hiding the pitches is evident, the numbers are bad... and we will see it when most customers select TSMC or Samsung.
 


AMD and GlobalFoundries are not conspiring, it's called a partnership.😍 The dirty underhanded tactics Intel pulled off for some 20 years was a conspiracy!:pfff: Intel was a rich kid bully sitting on the street corner taking AMD's lunch money every day since birth to starve them out, and keep them as weak as possible. If you support that type of treatment and think the measly 1 billion dollar settlement was good enough restitution for a lifetime of crime that's your opinion and you are entitled to that.🙁 I think it's an unforgivable scandal and very telling about the true nature of Intel as a company! TDP is not a measurement of power consumption, but of a dissipation of heat which there is no universal standard. And you make guesses about GlobalFoundries based on their history without thinking the changes they have made are not going to make any difference.:pfff: You think that GlobalFoundries is hiding their pitch information from you, so you guess their pitches are bad. You think that their 7nm is 14nm, because you read it in an article you liked. You talk about Roadmaps, but the roadmap for 2018-2019 are unclear by AMD.
AMD-FAD-Zen-Core-Roadmap.png

AMD-Eypc-Roadmap-2017.png

What do we know? We know that Epyc is made up of 8 core parts. What process is the next Epyc going to be made from? What's the time line on that? I'm just making guesses on possible outcomes in best case scenarios, and I'm not pretending that they are anymore than guesses and potential possibilities! Just because you have a pessimistic outlook on AMD, and it's partners doesn't mean I have to share that pessimism!

Edit: What about Navi? What process does it use? When is it going to be released?
AMDGPU.jpg
 


I didn't say that AMD and Glofo are consipiring. I said someone else is trying conspiracy theories.

Intel was caught playing dirty once, not "for some 20 years", and this issue was resolved with a mutual agreement signed by AMD and Intel.

AMD has been involved in dirty stuff as well. On the one extreme we have early x86 chips being literal clones of Intel products that AMD got using dirty reverse engineering tactics, until the court forced AMD to stop cloning Intel designs and AMD had to spend money on designing its own chips. On the other extreme we have the last class action lawsuit for "false and misleading statements to investors about the manufacturing and subsequent launch of, as well as the demand for, its Llano microprocessor".

No one here supports Intel dirty tactics, simply we don't buy the pretension that AMD is some kind of non-profit charity organization, when AMD was has been caught playing dirty, cheating,... Not to mention that AMD economic situation is a consequence of the dozen of strategic, management and engineer mistakes made by AMD during its history. AMD financial problems did start in the K6 era, but the true problems did start a bit latter with the fab investment, as tell to us by former president and chief operating officer of AMD

The trouble in the entire economic model was that AMD did not have enough capital to be able to fund fabs the way they were funding fabs," Raza said. "The point at which I had my final conflict was that [Sanders] started the process of building a new fab with borrowed money prematurely. We didn't need a fab for at least another year. If we had done it a year later, we would have accumulated enough profits to afford the fab in Germany. He laid the foundation for a fundamentally inefficient capital structure that AMD never recovered from. I told him: don't do it. I put the [purchase orders] on hold. He didn't tell me and accelerated the entire process."

And Ruiz, another president of AMD, confirms

As a result we had a mediocre customer plan, a hit-or-miss reputation, and no global strategy at all...

And all this happened before Intel dirty tacts. Therefore people would stop from pretending that AMD was a kind of successful company with superb designs

From here AMD problems continued because of bad strategies and financial plans

What was sucking away the company's money? It was those darned fabs, just as Raza had feared. In the company's 2001 10-K, AMD estimated, "construction and facilitation costs of Dresden Fab 30 will be approximately $2.3 billion when the facility is fully equipped by the end of 2003." There was also a $410 million to AMD Saxony, the joint venture and wholly owned subsidiary that managed the Dresden fab.

By the following year, AMD upped its estimated costs to fund Dresden to $2.5 billion and added that by the end of 2001, it had invested $1.8 billion. The estimated costs continued to rise, as per the 2003 10-K: "We currently estimate that the construction and facilitation costs of Fab 30 will be $2.6 billion when it is fully equipped by the end of 2005. As of December 29, 2002, we had invested $2.1 billion in AMD Saxony." That same year, AMD plowed ahead with a new Dresden fab ("Fab 36"), investing $440 million into it by the end of the year.

The money for these huge investments all relied on AMD's ability to sell chips, and AMD's ability to sell chips was made easier by its competitive edge over Intel. Unluckily for AMD, Intel didn't take this challenge lying down.

And then was when Intel changed the game thanks to an alternative design from one of its design groups:

This Core architecture accomplished several important goals: it gave Intel a fast, power-efficient 64-bit Xeon in the server market to stem Opteron's tide; it took back the symbolically important performance crown in the desktop market; and it was much more power-efficient than AMD's laptop chips right at the time when laptops began to outsell desktops for the first time. (AMD's power consumption in laptops became competitive only recently with 2011's Llano and 2012's Trinity parts.)

The Core architecture hit AMD where it hurt, but the biggest damage to AMD's long-term health came from Intel's execution strategy. Beginning around the same time, Intel moved to a system of smaller but aggressively timed processor updates that it called "tick-tock."

Then come the ATI disaster. AMD acquired ATI. This was a good idea, the problem were that (i) AMD did pay an huge sum, above the real value of the company, that generated a huge debt for AMD and (ii) the merging of AMD and ATI was a disaster:

Though a good idea, the two companies were never integrated well. "The vision to bring the two companies together, or at least to get a video component business, a graphics component business for AMD made sense," former AMD marketing manager Ian McNaughton told Ars. "How they went about executing that plan failed."

“This was an acquisition treated like a merger,” McNaughton continued. “So the AMD people were AMD people; the ATI people were ATI people. They continued to live in separate buildings, they continued to report into separate structures, they continued to wear their logos. It took a long time to change the mentality, and I don't think it ever really did change."

Differences in culture divided loyalties within the combined company, to the point that another former AMD staffer told us that some employees saw themselves as members of either a “green” AMD (the CPU side) or a “red” AMD (the GPU side). Those employees often prioritized the needs of their division’s individual products rather than the combined products that ATI had been purchased to help build. This led to delays. Reportedly, three versions of the combined “Fusion” chips were produced before one was deemed market-ready, by which point the chips were much later than initially promised.

The internal issues also distracted the company from the very real engineering issues affecting products already in AMD’s pipeline at the time of the ATI purchase—2007’s “Barcelona” Opteron processor arrived late and didn’t meet performance expectations due in part to a nasty bug (the short-term fix for which sapped performance by an additional ten percent or so). This situation was substantially duplicated in 2011 when the “Bulldozer” architecture also arrived late and with less performance than promised. In both cases, AMD stumbled when it badly needed a win, and Intel's solid execution during this period threw AMD's problems into even harsher relief.

"The next resulting four years of lack of innovation [after the ATI purchase] was probably one of those hangovers of that failed acquisition," McNaughton told Ars, "because they didn't come down and lay down the law and say 'this is our roadmap and our vision and let's start executing to the roadmap,' like you have to do when you have 6,000 engineers on staff."

Then come the dirty play from Intel, which had a small impact on AMD, and the situation that AMD is facing is the result of their own mistakes:

By contrast, Intel holds about $23 billion in long-term debt obligations.) Even if Intel had not acted the way it did, AMD faced an uphill battle—and that slope has simply gotten steeper as Intel has grown larger and as AMD’s smaller competitors (read: ARM licensees) have grown more numerous.

“They’ve put themselves in this corner of the marketplace, and it’s an odd one, they admit it," Craig Stice, an analyst with IHS Global Insight, told Ars. “But at the same time, you never get the sense that they are making strides for attempting to get themselves out of that corner. You never get the intention that they want to be bigger than Intel. They seem happy in their little corner to an extent and that piece of the market has been dwindling from them.”

Even AMD former chiefs admit that Intel wasn't the problem. The problem ios back to Sanders:

Former CFO Barton is not convinced that the company has much a future. “[Even without the lawsuit against Intel,] it wouldn’t have mattered,” he said. “[Sanders] took his shot, and the game’s been played.”

https://arstechnica.com/information-technology/2013/04/the-rise-and-fall-of-amd-how-an-underdog-stuck-it-to-intel/
https://arstechnica.com/information-technology/2013/04/amd-on-ropes-from-the-top-of-the-mountain-to-the-deepest-valleys/

The pair of articles is old and don't cont the recent history with AMD continuing making mistakes, such as the ambidextrous strategy and posterior cancellation of projects, the failed Seamicro business acquisition, which added another half billion to AMD debt, or all the disaster behind the new RTG group.

TDP is about heat dissipated, which by virtue of the first law of thermodynamics is related to the power is being consumed at the socket level. There is a standard definition of TDP that everyone has been using, including AMD, until Zen. With Zen, AMD invented a new metric, that mislead consumers. People doesn't follow the details of technology, see a 95W chip from AMD and believes it is more efficient than a 140W chip from the competence, still reviews prove that the 140W chip dissipates less heat than the 95W chip. The same about the 65W rating that AMD gives to the 1700, as reviews have noted:

The 1700 consumes 90W in reality. AMD bull*** its TDP.

You claim that we have to ignore all the history of Globalfoundries and now it is all different. Still you above quote them saying that the 14nm --> 7nm node brings 2x scaling factor, when it would bring a 4x factor. They are deliberately misleading again, nothing has changed.

I don't think that their 7nm is 14nm, because I read it in an article. I know their 7nm is in reality a true 14nm node, because I have made the math. I have posted the math a dozen of times in this thread. Amazing that it has been ignored another dozen of times...

I don't think that GlobalFoundries is hiding pitch information from me. I know that Globalfoundries is hiding the information to everyone: We’re not advertising what our pitches are, we are just saying we have a very competitive base 7nm offering,” said Patton.

The roadmap for 2018 was posted here many times. I will post it once again

zen-pga-pineapples-hardware.png


Zen2 is planned for 2019, but products and codenames aren't still disclosed. It is not even confirmed that Zen2 will fit in the AM4 socket.

When I refused all the nonsense and hype surrounded AMD products I didn't have a pessimistic outlook. I was having a realistic outlook. When I refuted nonsensical claims about Steamroller, Kaveri, Excavator, Carrizo, Carrixo-L 300-series Fury-X Polaris, Vega, Zen EPYC, Summit Ridge, ThreadRipper,... I was being realist.

Jaguar cores @ 3.2GHz on Sony console update was nonsense. 16CU Bristol Ridge was nonsense. Steamroller killing Haswell was nonsense. HBM on Carrizo was nonsense. Fury-X leaving Nvidia in the dust for a decade was nonsense. Zen achieving 5GHz on air, IPC above SKL, 2x256bit FAC units, 162mm² die, 20% better efficiency than Broadwell-E, beating KBL on games, 2016 launch, beating 20-core Xeon on Blender,... all that was nonsense. As was nonsense the pretension that a magic BIOS/AGESA was going to fix the latency problem on RyZen.

I am not against AMD. I am against nonsense, hype and certain suspect press press misleading people.

By the similar reason I am not being pessimistic when I say that the idea of Zen2 8-core chip achieving 5.6GHz on air with a TDP of 57W is NONSENSE. It is not a question about being pessimist/optimist fan of a brand or another, it is about having a minimal knowledge of the laws of physics.
 
Although I appreciate the discussion and information, I don't think there's more to be learned here. Specially when views are intrinsically biased on the information each can gather and interpret.

Agree to disagree, please.

Cheers!
 
I'm basing my opinions on facts. You don't want to accept the facts. Your math is wrong! Plug in the numbers and follow the plot, and take into considerations that GF is using 6T! As the picture illustrates below you increase area by reducing the standard cell! GlobalFoundries will have more transistors than Intel, and will be denser than Intel's 10nm!
AXdmPFR.png

https://www.semiwiki.com/forum/content/6879-exclusive-globalfoundries-discloses-7nm-process-detail.html
Scott Jones illustrates this to account for tracks!
20113d1499886241-standard-node-trend-2-jpg

And the picture below shows you what to expect node to node speed improvement. Shifting from 28nm to 14nm a full node shows a performance gain of 45%! Looking at the same picture you can see going from 14nm to 7nm will yield 40%! These are right inline with what GlobalFoundries is claiming.
17230d1462285489-speed-improvment-graph-min-2-jpg

https://www.semiwiki.com/forum/content/5757-standard-cell-libs-memories-mixed-signal-ip-availabe-7nm-ff.html

To sum it up Juanrga you just don't believe the numbers and the comments being reported, and I do!

Edit: believe is too strong a word, I am optimistic about the claims from GoFlo!
Adding image to aid clarity to cell size
Metal_Track_Scaling.jpg
 


Wasn't all of this answered before?

Didn't I mention how Jones is giving incorrect information for Intel 14nm, and that the real 14nm node is more dense than what he claims? Didn't I mention how Jones changed his equation to change the definition of "standard node"?

Since you are in contact with him, I suggested you to explain him that the he is confounding the low-voltage and the high-density sram cells in Intel 14nm node, and that the value of 0.0588μm² he gives in his article comparing 14nm and 16nm among foundries would be changed to 0.0499 μm². I guess you didn't communicate this to him.

Didn't I mention how a true shrink from 14nm to 7nm would provide an area scaling of 4x, but Glofo only reports 2x scaling for its '7nm' node because it is not a 7nm node?

The math is simple. Linear scaling factor is 14/7 = 2. The quadratic scaling is (14/7)^2 = 4. Indeed a (14nm * 14nm) square has 4x more area than a (7nm * 7nm) square, not 2x. You can continue claiming that my "math is wrong!", but it is not true. The truth is that Glofo is cheating us. Their public claim of 2x area scaling implies they are NOT shrinking from 14nm to 7nm. And if they openly cheat us with public data can be easily checked by us, then imagine what can happen with fundamental data as pitches, which they refuse to share with us.

Didn't I mention that, for marketing purposes, foundries report improvements on the optimal parametric range of new nodes? TSMC makes similar claims for the 16nm node vs 28nm.

TDF-TSMC-16nm-Ge-finFET-IEDM-diag-1-lrg.jpg


Take the Sony console, the version on 28nm has Jaguar core clocked @1.6GHz, the version on 16nm has cores @2.13GHz. Does this mean that porting a T5 to 16nm will increase clocks to 4.9GHz? NO

Imagine AMD ports some Godavari or Bristol APU from 28nm to Glofo 14nm. Will the 14nm chips will be clocked at 6GHz, because Glofo claims a 45% improvement? NO

For same reason porting Zen to 7nm will NOT increase clocks to 5.6GHz. It is PHYSICALLY IMPOSSIBLE.

In fact, you only take the transition from 14nm ot 7nm to make your wild claim, but imagine we apply your wrong logic to the whole "Speed improvement graph" that you bring us:

17230d1462285489-speed-improvment-graph-min-2-jpg


We start with a 3.5GHz chip on 28nm. Then using 45% we obtain 5GHz on 14nm. Using 20% we obtain 6GHz on 10nm, and finally using the other 20% we obtain 7.3GHz on 7nm. According to you invalid logic chips clocked at 3.5GHz on 28nm would hit 7.3GHz on 7nm, which is obviously pure nonsense.

Note as well the rang of frequencies reported in that graph. It goes from 20GHz to 180GHz. They are reporting max frequencies at the transistor level. Those aren't the frequencies achieved by real CPUs. That graph is a best-case scenario that avoids latencies/penalties for a real CPU. This means those percentages reported in the graph don't correspond to any real design. That is, a real CPU ported from 28nm to 14nm will not get 45% performance increase.

This all is not about being optimistic/pessimistic or about "believing". This is about applying maths and physics, and using hard facts.
 

You bring up 14nm for no reason, because we are talking about 10nm and 7nm. The 10nm standard cell height for Intel is 272nm. The SRAM cell size is 0.0312um^2. GF is 240nm and 0.0269um^2. GF is 6 tracks vs. Intel’s 7.56 tracks. This changes density in favor of GF! You don’t take this into account in your calculations for node density! You don’t believe the data in the data table! Transistor performance and density directly affect CPU performance. You are not adding anything new to the discussion just arguing, so I’m done with it. We will find out next year!
 


I expect AMD to launch 7nm Zen2 in 2019, but I don't rule out a delay to 2020.
 
Amd haven't even disclosed how long ryzen's pipelines are? Not sure if the design can even do 5ghz with reasonable voltage(1.4V or less)

Currently my chip will do
3.6Ghz 1.15V
3.7Ghz 1.225V
3.8Ghz at 1.325V
3.9Ghz at 1.375V

4.0 isn't stable at even 1.425V probably would need 1.5 at least

I read from CHEW that threadripper can generally do the same frequency's with .1V less this is top binned parts.

Basically all i expect from pinnacle ridge is the same results as threadripper most if not all chips will hit 4.0ghz at least with some possibly hitting 4.2ghz with 1.4V.
 


19 stages: there is no problem to achieve 5GHz. The problem will be cooling.
 
AMD’s MCM Design Cost Savings Allow Aggressive Pricing

AMD-MCM-Ryzen-Zen.jpg


"As the underdog, AMD has to be more aggressive than Intel to seize marketshare. At the same time, Intel enjoys greater economies of scale and can charge more as the dominant brand. As a result, AMD has turned to innovative ways to undercut their giant competitor. For their new Summit Ridge designs, AMD turned to a MCM architecture. As it turns out, this leads to significant cost savings.

For Ryzen, Threadripper, and EPYC, AMD is using a common 4 core Summit Ridge design. This is made up of 2 4 core CCX units on a single die making up 8 cores. To create Threadripper and EPYC CPUs, AMD stitches together 2 or 4 modules together on a MCM package. These are connected using the high-speed Infinity Fabric interconnect. As a result, these larger CPUs are somewhat glued together, albeit designed to do so.

AMD MCM Cuts Cost by 41%
According to AMD, the move to a MCM design is critical to their pricing strategy. By using a common silicon design, AMD is able to reap greater economies of scale. The top 5% percentile get used in Threadripper with even better chips used for EPYC. Regular Ryzen gets lower end chips and defective ones are harvested for the low-end Ryzen chips. This means AMD can get better effective yields and make the most out of their silicon."
"Due to the MCM design, AMD’s 4 module 32 core CPU costs just 0.59X that of a monolithic 32 core design. This 41% cost saving is getting passed onto the consumer in the form of aggressive pricing. The remaining question is how much performance is being lost with the MCM design. It will also be interesting to see how Intel will react and evolve to meet this resurgent AMD."

https://www.eteknix.com/amds-mcm-design-cost-savings-allow-aggressive-pricing/
 


"As a result, AMD has turned to innovative ways to undercut their giant competitor. For their new Summit Ridge designs, AMD turned to a MCM architecture..."

This is not anything "innovative". MCM is an old technology has been used in the industry for many years. IBM Power2 CPU released in 1993 used MCM. The main chip Nintendo's Wii U released in 2012 is another MCM package.

Moreover, AMD already used MCM designs before. For instance, the Bulldozer/Piledriver 16C Opteron used two dies of 8-core each just to reduce costs.

The slide is a bit misleading. It mentions only die cost reduction, but it doesn't mention the costs associated to packaging the dies, including the own packaging yields. But of course, even including the packaging extra cost, the whole system is cheaper than an alternative design with a giant monolithic die.

Why are most server chips monolithic? Because the MCM approach has both performance and power penalties. An monolithic die is better both for performance and power. That is the reason why engineers from IBM, Intel, Fujitsu, Sun/Oracle, MACOM, Cavium,... have designed monolithic die for their server chips.

Only reason why AMD is using MCM is because it is cheaper for AMD, as I have been mentioning since 2015.
 


Why on earth would they do that lol.

Maybe even Amd can't find vega gpu's? Say what you want about VEGA i sure have a lot of negative things to say(for one its the worst GPU launch from Amd since they took over ATI IMO) but it still performs around a 1070-1080.

Ryzen is easily fine so this is just plain nonsense from Amd to do that and its misleading to the people at the ryzen/radeon stand
 
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