goldstone77
Distinguished
juanrga :
goldstone77 :
I just received and email from Scott Jones, and he responds:
Scott Jones <-------------->
5:42 PM (2 hours ago)
to me
Hi John
This article has the actual numbers from Global Foundries and Intel as they were directly disclosed to me by the two companies: https://www.semiwiki.com/forum/content/6879-exclusive-globalfoundries-discloses-7nm-process-detail.html
Intel is denser if you don't include tracks but since standard cells include tracks in reality Global Foundries is slightly denser.
The latest standard node analysis form me includes this data and is correct based on the best information available today.
Best regards
Scott
Sent from my iPad
Edit: Blanked out email address
Scott Jones <-------------->
5:42 PM (2 hours ago)
to me
Hi John
This article has the actual numbers from Global Foundries and Intel as they were directly disclosed to me by the two companies: https://www.semiwiki.com/forum/content/6879-exclusive-globalfoundries-discloses-7nm-process-detail.html
Intel is denser if you don't include tracks but since standard cells include tracks in reality Global Foundries is slightly denser.
The latest standard node analysis form me includes this data and is correct based on the best information available today.
Best regards
Scott
Sent from my iPad
Edit: Blanked out email address
This doesn't add that wasn't discussed before:
(i) I can trust Intel data. I find difficult to accept Glofo data, because the long historic record of claims made by Glofo that turned out to be wrong. What makes it more suspicious is that other companies are sharing pitch values for their nodes, but Glofo refuses to give them, as mentioned in a former post:
At IEDM late last year, Samsung showed 7nm designs sporting FinFETs with 44-48nm contacted polysilicon pitch and 36nm metal pitch. In March, Intel said its 10nm process now in production supports 36nm minimum metal pitches, 34nm fin pitches and 54nm gate pitches and has a density of 100.8 million transistors/mm2.
“We’re not advertising what our pitches are, we are just saying we have a very competitive base 7nm offering,” said Patton.
(ii) Scott Jones took ASML formula and changed it to fit his beliefs. Using that formula he found that Intel process is denser. He didn't like that and then changed the equation by other he invented and applied it to get that Intel is less dense. Again this was mentioned before:
He has changed the definition for Intel 10nm from 8.0 to 8.3. He has changed the definition for TSMC 7nm from 9.0 to 7.9. He has changed the definition for Glofo 7nm from 8.8 to 7.8. Note that the physical parameters of the nodes of the different foundries have not changed, simply Scott has changed the "label" that he applies to the nodes.
(iii) You could have used the email to explain him that his claims about Intel 14nm are wrong. He used incorrect HD cell densities for Intel in his comparison with TSMC 16nm and GF/SS 14nm. The correct values for Intel 14nm are
High-Density SRAM: 0.0499 μm².
Low-Voltage SRAM: 0.0588 μm².
High-Performance SRAM: 0.0706 μm².
Say him that he confounded the high-density and low-voltage densities. 😉
I guess I am leaving this topic as well, because it is going in circles.
I did confront him with your claims with the points of reference you made, and asked him if he would like to comment, and that was his response. Apparently he feels that the information he has( handed directly from the companies) is accurate in his version of the standard node. It is a wiki page and you would think that if it was terribly misleading someone else would have voiced their concerns. You also have to realize he isn't the only person working on this. It's a group of people with him.
GLOBALFOUNDRIES 7LP
"As Dan Nenni previously discussed in his GlobalFoundries 7nm and EUV Update! blog 7LP (Leading Performance) will offer a greater than 40% performance improvement relative to 14nm or greater than 60% lower power. Area scaling will be approximately 2x and the die cost reduction will be greater than 30%, with greater than 45% in target segments. Initial customer products on 7LP are expected to launch in the first half of 2018 with volume production in the second half of 2018.
The 7LP process will be produced with optical lithography and what we now know is the Contacted Poly Pitch (CPP) will be 56nm and the Minimum Metal Pitch (MMP) will be 40nm produced with Self-Aligned Double Patterning (SADP). A 6-track cell will be offered with a cell height of 240nm. The high density 6T SRAM cell size is 0.0269 microns squared. A 7LP+ process is also planned that will take advantage of EUV when it is ready to offer improved performance and density.
GLOBALFOUNDRIES is also in the unique position of providing an in-house ASIC platform FX-7 on their 7LP process. FX-7 provides a comprehensive suite of tailored interface IP including High Speed SerDes (60G, 112G), differentiated memory solutions including low-voltage SRAM, high-performance embedded TCAM, integrated DACs/ADCs, ARM processors, and advanced packaging options such as 2.5D/3D"
Juanrga when you look at these claims that appears to be fairly close to a full node shrink from their 14nm. Over 40% performance gains, and 60% lower power. Scaling will be approximately 2x and the die cost reduction will be greater than 30%, with greater than 45% in target segments suggest a close to full node shrink as well. A 6-track cell will be offered with a cell height of 240nm. The high density 6T SRAM cell size is 0.0269 microns squared. Honestly, Juanrga the data speaks for itself. If the data is accurate this is nearly a full node shrink from 14nm, and we will know for sure when 7nm actually comes out, and that looks like it is projected to be the first quarter of 2019. When you compare Ryzen to Intel in power draw and performance at 14nm not + or ++ this shows you that they are not very far apart at 14nm. It's says over 40% performance gains, with just 40% frequency over say 4GHz that is 5.6GHz, or 60% lower power will land a 39/57W TDP. Those processors are going to be beast!
Edit: I also, think AMD has an opportunity if GlobalFoundries comes through with full production 2nd half of 2018 for AMD to drop 7nm ontop of Intel's 10nm as I have been saying for the past year. And they appear to be on schedule.
"Given that the new AMD Ryzen architecture was launched on 14nm in Q1 2017, it should be reasonable to predict that AMD could refresh Ryzen on 7nm in the second half of 2018 putting AMD 7nm just six months behind Intel 10nm. I certainly hope this is the case because I really want to see how Intel PR spins that one!"
https://www.semiwiki.com/forum/content/6837-globalfoundries-7nm-euv-update.html