Collection of AMD K10 data

[abw]

well, the pIII was built around the p6 architecture, first available with the pentium pro, and then used in the pII with a half speed l2 cache instead of the full speed 256/512/1 mo l2 cache of the pentium pro..apart from taht fact, you seems unaware that 128 bit sse execution cut some calculus times by a factor of 2....athlon64 need several passes to realize a 128 bit sse fpu instruction, core2 duo need only one.as you seems unaware that truncated fpu calculus are made using 128 bit sse precision instead of x87 commands...it s now a classical horse for intel : unable to beat amd in the ipc race, they tend to create new instructions, allegedly for better performan in fact to create inabilities among its rival s products..so it was with the p4 and sse2....so the improvement of the fpu are not limited to the x87 commands, but are massively used for the 128 bit sse units, which are located along the classical x87 fpus...

 

[Scientia_From_AMDZ]

well, the pIII was built around the p6 architecture, first available with the pentium pro, and then used in the pII with a half speed l2 cache instead of the full speed 256/512/1 mo l2 cache of the pentium pro

Ah, then you should know that the significant difference with Pentium Pro was the use of micro-instruction decoding, translating the x86 instructions into RISC-like instructions. AMD first did this with K5 although it was done independently by Nexgen with K6. Of course, the lead Nexgen architect was a former Intel employee (although he did not work on Pentium Pro). However, K7 would have included any experience gained from both K5 and K6. That is a reasonable separation between the classic and modern instruction decoding on X86. So, if you want to take C2D back to Pentium Pro then Barcelona goes back to K5.

..apart from taht fact, you seems unaware that 128 bit sse execution cut some calculus times by a factor of 2....athlon64 need several passes to realize a 128 bit sse fpu instruction, core2 duo need only one.as you seems unaware that truncated fpu calculus are made using 128 bit sse precision instead of x87 commands...

Curious assumption on your part, SSE was released in 2002 and you think I am unaware of it five years later. Also, when you use the word, "passes" that implies that AMD peforms 128 bit SSE operations serially which it does not. The hardware can handle 128 bit words by loading 64 bits through the SSE Multiply port and 64 bits through the SSE Add port. Since the loads themselves have to be done one at a time this takes several cycles but the computation itself is still on a 128 bit word. Barcelona simply removes this necessary hack and makes all of the hardware 128 bits.

However, SSE still does not contain all of the functionality of FP (although it has improved with each update), and math routines are still easier to do by first converting infix notion to postfix notation. This same level of functionality would have to be added to SSE with a math library and this would increase the overhead.

it s now a classical horse for intel : unable to beat amd in the ipc race,

They already did with C2D. C2D's IPC is higher than K8's.

they tend to create new instructions, allegedly for better performan in fact to create inabilities among its rival s products..

I suppose someone could argue that AMD did the same thing when they created AMD64. And, perhaps the same could be said of 3DNow!

so it was with the p4 and sse2....so the improvement of the fpu are not limited to the x87 commands, but are massively used for the 128 bit sse units, which are located along the classical x87 fpus...

BTW, are you aware that AMD uses the same hardware to do FP as SSE and that Barcelona will as well?

 

[Scientia_From_AMDZ]

So,what would be your guess as to the performance increase over the last core design?do you think they have achieved 40-60%?

I would say a 15-20% increase in Integer IPC.
an 80% increase in SSE
at least a 26% reduction in power draw with 65nm over 90nm

 

[piesquared]

See the updated one

Thanks. That's a bit better. What I'm still funcused about is:

QFX (dual socket F) can handle 32GB??? Really???

And just 'cuz the M2N32-SLI can take 8GB does that translate into the chip on the AM2 socket being able to use it all?

:?

What would you be running to utilize so much memory?unless you do rendering or video editing or that type of thing ,i dont see the need.

SuperFetch could make good use of it. I'm not sure what the point of diminishing returns would be, but i suspect that on a QuadFX platform, one could make use of a substantial amount of memory.

 

[Scientia_From_AMDZ]

What would you be running to utilize so much memory?unless you do rendering or video editing or that type of thing ,i dont see the need.

Well, you never know, 2GB's might be the minimum to install when Vista gets updated. :lol: Current AM2 systems could be used for CAD and other applications that take a lot of memory. I don't imagine most home systems would need more than about 1 GB right now.

 

[piesquared]

4x4 i can see alot of memory in,but for the avg.joe.2-3gb.with a single chip.

My bad, I thought you were refering to 4x4. But yeah one would think that 2-3-4 GB would be plenty for avg. joe.

 

[CaptRobertApril]

I would never reccomend 1gb even with XP.I have 2 and I wont be satisfied till i have at least 3.With vista my suggestion starts at 2gb as well,because there is so much more reliance on the gfx card.

I've pretty well settled on 8GB so that I can allocate the maximum 4GB to Photoshop and run the rest of the system on the other 4GB. I often have Photoshop running all day and it's such a RAMHAWG that I want to be able to be able to run anything else I want without shutting down Photoshop, rebooting, running the apps I want, shutting them down, rebooting and then running Photoshop. I'm not too hot on the RAMdisk aspect as my 150GB Raptor OS HD will serve perfectly well.

 

[abw]

thanks for alla the insight..yes, i know, as it s showed in the barcelona diagram that the x87 fpu and sse fpu are in the same pipe..i didn t say that the k8 was unable to make a 128 bit sse calculus, but that it need more clock cycles, as the execution unit are only 64 bit...for the rest, i m agree with the majority of your sayings...

 

[CaptRobertApril]

Forgive me for the repost, but I'd really like to get some confirmation on this:

Let's do some hypotheticals (all UNregistered):

Single Socket AM2+ - 2GB x 4sticks = 8GB

Single Socket AM2+ - 4GB x 4sticks = 16GB

Dual Socket 1207 - 2GB x 4sticks = 8GB

Dual Socket 1207 - 4GB x 4sticks = 16GB

Dual Socket 1207 - 4GB x 8sticks = 32GB

Are all those configurations correct and would K10 be able to fully access all that RAM, given the appropriate motherboard and OS?

 

[rammedstein]

i didn't think you could get 4gb unregistered sticks, and current amd memory controllers only support 2gb unreg sticks, so maybe, i know they can handle the 8gb no problem, but i dont know about any of them that use 4gb stick configs, because i don't know if it supports 4gb unregistered sticks yet, or if they even exist, and even if they did they would cost one hell of a lot of moulah

 

[CaptRobertApril]

i didn't think you could get 4gb unregistered sticks, and current amd memory controllers only support 2gb unreg sticks, so maybe, i know they can handle the 8gb no problem, but i dont know about any of them that use 4gb stick configs, because i don't know if it supports 4gb unregistered sticks yet, or if they even exist, and even if they did they would cost one hell of a lot of moulah

You're absolutely right that 4GB unreg sticks aren't on the market yet, but given the expectation that K10 won't be around for a while longer, I'm guesstimating that they'll both hit the channel at about the same time. The price of the 4GB sticks will be astronomical when they first hit the streets, but like everything else it will come down fast. RAM prices are generally treading downwards into the realm of reality again anyway, as they had peaked too far and too fast.

So to keep things current, let's only talk about the:

Single Socket AM2+ - 2GB x 4sticks = 8GB

Dual Socket 1207 - 2GB x 4sticks = 8GB

As that is the RAM point that I'm most interested in.

It's now the 12th of Never and K10 is out in all its glory in AM2+ and 1207 config. So out I go and buy it and get 4 sticks of 2GB RAM to plunk into an appropriate motherboard.

Therefore, if I get the AM2+ CPU, and/or if I get 2x1207 CPUs, what now stands in the way of me booting up XP 64, allocating 4GB to Photoshop and the other 4GB to OS and various sw? I'm asking as I am quite unclear on this.

 

[qcmadness]

i didn't think you could get 4gb unregistered sticks, and current amd memory controllers only support 2gb unreg sticks, so maybe, i know they can handle the 8gb no problem, but i dont know about any of them that use 4gb stick configs, because i don't know if it supports 4gb unregistered sticks yet, or if they even exist, and even if they did they would cost one hell of a lot of moulah

You're absolutely right that 4GB unreg sticks aren't on the market yet, but given the expectation that K10 won't be around for a while longer, I'm guesstimating that they'll both hit the channel at about the same time. The price of the 4GB sticks will be astronomical when they first hit the streets, but like everything else it will come down fast. RAM prices are generally treading downwards into the realm of reality again anyway, as they had peaked too far and too fast.

So to keep things current, let's only talk about the:

Single Socket AM2+ - 2GB x 4sticks = 8GB

Dual Socket 1207 - 2GB x 4sticks = 8GB

As that is the RAM point that I'm most interested in.

It's now the 12th of Never and K10 is out in all its glory in AM2+ and 1207 config. So out I go and buy it and get 4 sticks of 2GB RAM to plunk into an appropriate motherboard.

Therefore, if I get the AM2+ CPU, and/or if I get 2x1207 CPUs, what now stands in the way of me booting up XP 64, allocating 4GB to Photoshop and the other 4GB to OS and various sw? I'm asking as I am quite unclear on this.

From the specifications, I am quite sure K8 (at least rev. F) and later CPUs can handle 8GB per socket.

 

[CaptRobertApril]

From the specifications, I am quite sure K8 (at least rev. F) and later CPUs can handle 8GB per socket.

This is my happy dance:

That's great! So I can go off and get my 2xQuad and 4x2GB sticks and live happily ever after!

 

[LordPope]

From the specifications, I am quite sure K8 (at least rev. F) and later CPUs can handle 8GB per socket.

This is my happy dance:

That's great! So I can go off and get my 2xQuad and 4x2GB sticks and live happily ever after!

yeah AMD is the only way u can go with that....965\975 boards dont even support 2 gb modules

 

[LordPope]

From the specifications, I am quite sure K8 (at least rev. F) and later CPUs can handle 8GB per socket.

This is my happy dance:

That's great! So I can go off and get my 2xQuad and 4x2GB sticks and live happily ever after!

yeah AMD is the only way u can go with that....965\975 boards dont even support 2 gb modules

explain how i am wrong again? i said it doesnt support 2 GB MODULES... i didnt say it couldnt support 8 gb's

you are wrong here P965 supports up to 8GB of memory
thats 4x2GB

http://www.intel.com/products/chipsets/p965/index.htm

 

[gOJDO]

pope, can you stop trolling on this thread!
if you have something to say about K8L, go ahead. if not, please don't destroy this thread. Also, you don't have to answer me.

 

[LordPope]

pope, can you stop trolling on this thread!
if you have something to say about K8L, go ahead. if not, please don't destroy this thread. Also, you don't have to answer me.

so stating a fact is considered trolling? since when? i agreed with FUD that for his desires...AMD is the platform for him

again how is that trolling?

 

[CaptRobertApril]

pope, can you stop trolling on this thread!
if you have something to say about K8L, go ahead. if not, please don't destroy this thread. Also, you don't have to answer me.

so stating a fact is considered trolling? since when? i agreed with FUD that for his desires...AMD is the platform for him

For the record, I was already aware that C2Q could handle 4x2GB and was checking to see if I had options on the AMD side.

I'll repeat it once again. I do not care one iota if my 2xQuad is made by AMD, Intel or Hasbro.

Sincerely,

FUD. :lol:

can I just kidnap the 200+ good posters here and transplant them to the xbit forums?Its virgin turf there and the mods do a great job of keeping up on stuff.

If I promise promise promise to send you lots of pictures of naked chicks in compromising positions will you please please please pretty please take me too??? 8)

 

[Ranman68k]

pope, can you stop trolling on this thread!
if you have something to say about K8L, go ahead. if not, please don't destroy this thread. Also, you don't have to answer me.

so stating a fact is considered trolling? since when? i agreed with FUD that for his desires...AMD is the platform for him

again how is that trolling?
gOJDO (and most everyone else) would prefer that we stay on topic -- especially in this "sticky" topic.

Motherboards, chipsets, and the RAM limits imposed by them do not apply to the K10.

 

[CaptRobertApril]

pope, can you stop trolling on this thread!
if you have something to say about K8L, go ahead. if not, please don't destroy this thread. Also, you don't have to answer me.

so stating a fact is considered trolling? since when? i agreed with FUD that for his desires...AMD is the platform for him

again how is that trolling?
gOJDO (and most everyone else) would prefer that we stay on topic -- especially in this "sticky" topic.

Motherboards, chipsets, and the RAM limits imposed by them do not apply to the K10.

Reasonable. Therefore, allow me to ask does the K10's aggressive fine grained clock gating and improvements in coarse graining offer any performance advantages or is it just a minor electricity saving?

 

[abinstein]

This slide:

confuses me. I found a lot of articles stating that the L1 would be 128kB, same as on K8. So:
1. the 64kB L1 on the AMD slide is a typo or
2. the L1 is 4-way

In the context of this slide, it is possible the slide is describing the L1 cache for data and not the L1 cache for instruction.

It's clear from the slide that it's talking about data cache. BTW, Opteron's L1 caches are 2-way, but it should be orthogonal to cache size, anyway.

 

[abinstein]

Barecelona pipeline:

This image is totally insignificant in terms of showing changes in the "Barcelona pipeline." The exact same graph was shown in AMD's 2003 presentation on Opteron.

It's interesting to see the turn of opinion tide right after AMD publicly throw out a list of nouns that they added to Barcelona. Barcelona is a beast, I've said that in the beginning. But it's being so not because this long list of tweaking improvements, but because there's a few bigger, more fundamental superiority over its previous generation and competitions:

1. Native quad-core with shared L3 as inclusive/exclusive victim cache.
2. Fine-grain power control, with little need of software support
3. More than double SSE/FP capability.
4. 32B instruction fetch (just say it's not easy to do it efficiently)

The tweaks are nice, but they are what would've made a P-II out of P-pro, or a Conroe out of Yonah. They make a core better, but not a monster.

BTW, I'm curious - how would a chip being a "monster" but not a "beast"?

 

[LordPope]

pope, can you stop trolling on this thread!
if you have something to say about K8L, go ahead. if not, please don't destroy this thread. Also, you don't have to answer me.

so stating a fact is considered trolling? since when? i agreed with FUD that for his desires...AMD is the platform for him

again how is that trolling?
gOJDO (and most everyone else) would prefer that we stay on topic -- especially in this "sticky" topic.

Motherboards, chipsets, and the RAM limits imposed by them do not apply to the K10.

After re-thinking ... you ae correct... wont take much to turn this thread into a AMD vs INTEL flame war...

my apologies..

 

[abinstein]

Reasonable. Therefore, allow me to ask does the K10's aggressive fine grained clock gating and improvements in coarse graining offer any performance advantages or is it just a minor electricity saving?

If properly implemented, it should help performance under power saving. More thoughts here.

 

[CaptRobertApril]

Reasonable. Therefore, allow me to ask does the K10's aggressive fine grained clock gating and improvements in coarse graining offer any performance advantages or is it just a minor electricity saving?

If properly implemented, it should help performance under power saving. More thoughts here.

There was some excellent info there. Thanks!