Itanium 2 Vs Opteron Vs Xeon Benchmarks here

[EugeneMc]

Interesting... I'd say... In german:

<A HREF="http://www.3dchips.net/content/review.php?id=76&page=1" target="_new">http://www.3dchips.net/content/review.php?id=76&page=1</A>

Here to translate it to english <A HREF="http://babelfish.altavista.com/" target="_new">http://babelfish.altavista.com/</A>

<P ID="edit"><FONT SIZE=-1><EM>Edited by eugeneMC on 05/14/04 02:01 AM.</EM></FONT></P>

 

[Mephistopheles]

You know, these results make me scratch my head in confusion...

I mean, is this possible? Intel invested a gazillion resources into a design with hundreds of millions of transistors and it performs like this? Lackluster performance? I mean, this should rock the hell out of this world! Is this all to blame on software? Good thing I'll probably be seeing one of those workstations with my own eyes. Was Intel so stubborn as to try an "extreme architecture" proposal with little future?

Also, if 32-bit is so hard, why don't they pack a full 30-40 million transistor 32-bit processor at twice the clock of the Itanium? They have all blueprints for that; they just need to work a way for the cores to interact. Like, imagine the current 1.5Ghz, 6MB I2 with a 3.0Ghz 32-bit core fully functional inside, working almost as if in parallel. Is this impossible or what? They just keep banging their heads against the wall with some stupid software emulation layer, while they have a much, much more powerful 32-bit processor lineup!... What's up with <i>that</i>????

Also, if they truly want to get a 300+ million transistor out the door like that, why don't they just pack like 4 Northwood cores and extend them with 64-bit extensions as simple as AMD's? Why go the absurdly complicated way?...

Just think about it: next year we'll have Montecito. Is it conceivable that even that isn't a respectable chip, even if it's a 667Mhz FSB (remember, that's 10.6GB/s bandwidth) part with two cores at clocks of like 2Ghz? And the damned thing has 24MB cache and the pathetic amount of over <b>a billion transistors</b>. A billion transistors, for crying out lout! There has to be something good about this!!!....

A billion transistors is 8 prescott cores! (with 125 million each!) If you consider northwood, you could make 16 fully-functional northwood cores with less than 880 million transistors!!! And in case you are thinking about heat, then consider Dothan: a <b>four-core dothan</b> would have <b>8MB total L2 cache</b>, with "only" 560 million transistors, and if you popped in 64-bit extensions (which would require like <b>a tenth of the resources that went into I2</b>, 'cause the Dothan core mask is already there and functional!!!) you'd have a <b><font color=red>killer</b></font color=red> chip that consumes only <b>80 watts</b> of power!!!!!!!!!! Aaargh, my god, what a waste...<P ID="edit"><FONT SIZE=-1><EM>Edited by Mephistopheles on 05/14/04 00:12 AM.</EM></FONT></P>

 

[Mephistopheles]

Alas, they're already in the process of making that killer chip in India. It's called Whitefield.

My point was: where the heck are the rewards for the stupendously high amount of resources spent developing Itanium?

<i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>

 

[Mephistopheles]

Holy mother of god!!

Holy crap!!!!!!

I checked on that, and I was wrong!

Montecito (dual-core I2 with 24MB cache) silicon has already been shown by Intel execs to some selected people....

And the damned thing sports <b>1.7 BILLION</b> transistors! That's like one transistor for every three people on earth! Either this is a phenomenally stupid architecture, or they're up to something. Will montecito be any good at all? I wonder.

<i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>

 

[juin]

Often site have test itanium each time it result in a major loss for the chip.Future test with montecito will result in the same lost.

i need to change useur name.

 

[juin]

While in the same time SGI sold 13000 I2 for the last quarter only.Going in range for the 50 000 I2.If Hp can sold up to about 150 000 I2.Analyste will see the quarter million chip sold for 2004.

i need to change useur name.

 

[flamethrower205]

Let's go with insanely stupid with Intel since they're so good at that

SEX is like math. Add the bed, subtract the clothes, divide the legs, and hope you dont multiply

 

[Mephistopheles]

Um, with 1.7 billion transistors? Wooow....

That's too much stupidity for me!!!!

***bangs head against the wall***

<i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>

 

[endyen]

Of the 13000 chips sold by SGI, I wonder how many were in "test systems" like you guys are getting. Once you take delivery, is it considered sold, even if you return it, and never pay 1 cent?

 

[juin]

If they do it just cost them a load of money cuz they have allready pay intel.

i need to change useur name.

 

[juin]

Just the L3 make 1 billion transistor plus tag and redundancy.I guess around 1.2 billion + 1.5 mb of l2 with split logic and systemes logic and bla bla. you get about 1.65 billion transistor split the rest of the core for about 90 million 50% bigger that prescott.Not to bad for a SMT dual core 6 instruction wide machine.You can compare whitefield and tukwila.You while get to the same result itanium will have about 4 time for cache so transistor.

i need to change useur name.

 

[leonov]

Current speculation on Aces and RWT estimate the die size at between 470mm^2 up to 674mm^2. That's *ONE* CPU. Current estimates of the size of dual Opteron in 90nm process is a bit less than 200mm^2 or only about a third of the size. One Montecito or 3 dual Opterons, I know which setup I would rather have ;0)

L

 

[Kelledin]

You know, these results make me scratch my head in confusion...

I know...the performance results are pretty dismal for IA64. Itanium's either getting crushed completely by every other CPU in the test, or it's getting edged out by the cooler, cheaper Opteron!

I imagine all will be explained when you get a chance to benchmark the thing yourself. I'm guessing it's down to the compiler--EPIC needs VERY intelligent compilers to milk out its real performance potential. icc is likely to be the only one that can cut it.

IMHO compiler dependence is Intel's biggest mistake. It's likely to kill IA64 for all but certain niche usage like Linux-based HPC.

And a little babelfish humor...

ith all respect the Itanium 2 opposite this reminds of a zickigen load donkey, which needs the correct fodder, in order to come into the courses. If he gets it, the post office goes off...

Teh post office, it go boom!

Of course, Babelfish also says SCO should "<A HREF="http://www.groklaw.net/article.php?story=20040508130601510" target="_new">lower code trousers</A>"--so we should have come to expect such linguistic missteps these days.

(Also odd, sometimes Xeon's HyperThreading appears to hurt its performance badly. WTF?)

<i>Look! Up in the sky! It's a bird! It's a plane! It's...

...an asthmatic werehamster?

<LHGPooBaa> Well, @#!& on me.</i>

 

[Schmide]

If you use 470^2=220,900mm and the 200^2=40,000mm, you get a 220,900mm/40,000mm = 5.5225x

Or 5.5 the size in terms of area.

Dichromatic for your viewing plesure...

 

[Mephistopheles]

The inquirer has reported that Montecito is being <A HREF="http://www.theinquirer.net/?article=15917" target="_new">shown off</A> right now; it should be considered as pretty much ready. They have its release planned for 2005.... Will it be any good?... I wonder...

<i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>

 

[juin]

Fastest chip around and by a huge margin.Power 5 on 90 nm will be able to compete.

Around this time price\performance advantage will be to hard to beat.Even on commercial workload migration will be a bargain.

i need to change useur name.

 

[flamethrower205]

When quantum comps come around and can do 10^14 ops/ second/ qubit, we are not letting Intel touch it lest they screw it up! It's gonna be my company making em, or AMD :tongue:

SEX is like math. Add the bed, subtract the clothes, divide the legs, and hope you dont multiply

 

[juin]

You will be able to say that to your grand little child of your youngest son.

i need to change useur name.

 

[flamethrower205]

lol, hell naw man, I do beleive we'll move to quantum computers in my lifetime.

SEX is like math. Add the bed, subtract the clothes, divide the legs, and hope you dont multiply

 

[juin]

If quantum transistor or else.

Quantum is not a big miracle actualie.Unless interconnect lenght can get close to CMOS i dont think that possible.

i need to change useur name.

 

[flamethrower205]

"Quantum is not a big miracle actualie"

Do you understand it's not the 10^14 ops/ sec that make quantum comps so special. That in a sense represents an upper limit which isn't all too exciting. The real stuff, imo, comes from superpositions and interference effects. There we can solve for all possible values through 1 actual evaluation and then do something funky like a fourier transform and get something meaningful in polynomial time that'd take exponential on classical. That's where the power lies. Also, there are certain cases where processing time is constant @ 4 or 6 ops let's say for ALL complexities.

SEX is like math. Add the bed, subtract the clothes, divide the legs, and hope you dont multiply

 

[P4Man]

Just a few things in Itaniums defense; the 32 bit scores, if I read them right, where actually achieved using x86 mode. Now no one in their right minds would even consider buying an Itanium to run x86 workstation software. If native software is not available, then you get something else. Benchmarking that is rather silly IMHO.

In "64 bit" (read: native) mode, Itanium is a much more respectable performer, even though it still gets beaten by Opteron in these apps. I'm not really surprised though, Itanium really isnt a good workstation chip, its far better at HPC and even commercial workloads with its strong FP performance and huge caches.

As for Montecito and its transistor count.. Don't be fooled, cache is "cheap" to produce, much MUCH cheaper than core logic, because it can be made (and is made) redudant. If you have a defect in the core logic, you have to throw away the die, if you have one in the cache, just deactivate that particual cache line, and use a spare one instead. Therefore, yields of a 600mm² Itanium wouldnt be necessarely worse than of a 160 mm² dual cored Dothan. A quad or octa cored Dothan would definately have much worse yields. So even if Montecito is a huge MF, it shouldn't be more expensive to produce as any other chip per mm². Being 5x as expensive to produce as a Celeron really is non issue for a chip that will sell >100x the price.

= The views stated herein are my personal views, and not necessarily the views of my wife. =

 

[juin]

At last a decent reply thank you.

i need to change useur name.

 

[trooper11]

well the big solution will come when carbon nanotubes can be harnessed to thier full extent and adopted into chips.

 

[juin]

I will put that in the same league as quantum computing.That might be the future.

i need to change useur name.