PCIe 2.0 x16 might bottleneck a 5870X2

[JeanLuc]

PCIe 2.0 x16 Total bandwidth 8Gb's


Radeon HD3870 - Transfer rate 2.2Gb's
Radeon HD4870 - Transfer rate 3.6Gb's
Radeon HD4870X2 - Transfer rate 7.2 Gb's
Radeon HD5870X2 - Transfer Rate X.X Gb's

I think its safe to assume the the 5000 line will offer more performance then the 4000 line which in turn will bring an increase in transfer rate on the PCie 2.0 bus (look at the jump between the 3870 and 4870). Given that a Radeon 4870X2 is nearing the maximum of the currant standard I worry for the Radeon HD5870X2 will be badly bottlenecked.

Please tell me there is a flaw in my logic here or that I'm missing something. Sorry if you think this is FUD but I just to get this of my chest. Thoughts?

 

[grieve]

Most people wouldn't notice a diffrence between 8x and 16x... I realy don't think it would matter if the the 5870 does actualy exceed the 16x limit.

I wouldnt worry about this till the time comes.

 

[Helloworld_98]

they're making a dual core 5870 X2 to compensate for their not being enough bandwidth for a dual GPU 5870 X2.

as the Single GPU with two cores uses less bandwidth than two GPU's with one core each.

 

[Shadow703793]

^+1. REAL PROOF or IT'S BS.

 

[JeanLuc]

My reasoning is based on the ever increasing demand for bandwidth on the PCIe bus, a CPU can only send as much data to the GPU as the bus allows, if that bus is full then it will have to wait for the next cycle.

they're making a dual core 5870 X2 to compensate for their not being enough bandwidth for a dual GPU 5870 X2.

as the Single GPU with two cores uses less bandwidth than two GPU's with one core each.

You keep posting this kind of unfounded claims which is misleading, if your going to make a claim back it up with some proof and since there is none don't post it at all.

 

[HibyPrime]

First of all, I'm making guesses here, I dont know the facts either.

strange, you're talking about basic instructions right?

Well, imagine a scene of highly textured/AFed/and AAed spheres. In theory, it seems all the cpu would have to do is tell the gfx card to create 30 different spheres all with their own coordinates, then tell them where and how the textures are applied, tell the card to do the AF on the textures, then AA the scene. All of this as many times a second as there are frames, so lets say 60 frames/sec.

I'm no D3D expert nor have I ever made any programs outside of grade 11 computer science, but I've seen some excerpts of code before, and it's actually fairly simple to make the kind of scene I was talking about (google "d3d code"). So these spheres should only require simple instructions.

So lets assume for the sake of argument the binary instructions for making one sphere uses 500kB (it's probably much, much less than that, but just in case I'm wrong, lets use that). AF should be a fairly short instruction, but you need to specify angle, camera position etc. so lets say the AF instruction is 100kB per texture on the screen. AA should be even an even simpler instruction, so lets leave that out entirely.

Now it's just simple napkin math. 500kB+100kB x 30 spheres x 60 frames = 1.03GB/sec

Now, given that I used such a simple scene and what I'm assuming are heavily inflated numbers, it becomes slightly clear how at 200 FPS a scene with thousands of structures could saturate the pcie bus.

CF/SLi on a card, not using alternate frame rendering (I'm not sure if there are any times when they still dont use AFR) would likely increase the required bandwidth by a large factor. For each frame, the cpu is sending out likely close to double the info it would normally be through the same x16 slot.


So, theres my retarded math from a guy who knows nothing. Please feel free to poke holes.

 

[Elk]

If I understand correctly the max bandwidth for a 16x PCIe 2.0 slot is 8GB/s.
So with this progression
Radeon HD3870 - Transfer rate 2.2Gb's
Radeon HD4870 - Transfer rate 3.6Gb's
Radeon HD4870X2 - Transfer rate 7.2 Gb's
Radeon HD5870X2 - Transfer Rate X.X Gb's
I'd say the PCIe slot is tapped.

Elk