There may be more to the design of the P4 than Intel is being given credit for. Obviously they focused on a high mhz core, but I have a hard time believing they arbitrarily just trashed the FPU without good reason. Here's some opinions of mine on why they might have done so:
As we know, we're gearing up for a 64bit ballgame. Intel has previously mentioned that there will be a desktop version of Itanium eventually and that it will probably not perform well on existing 32bit code, as it will run this in emulation. The reaction to this has news has been universally negative.
In order to provide best performance on legacy code, it would be nice to have 32bit apps running at least on a semi-modern risc-like instruction set with few of the "traditional" x86 pitfalls.
Hence, by providing SSE2 and including such a poor FPU that developers are all but FORCED to use it, Intel is modernizing the 32bit codebase to a new, more efficent model.
When IA-64 chips hit the desktop, this newer code will be much easier for the 64bit cpu to emulate without as many kludges as older 32bit code. There will probably still be emulated compatability back to 8086, but if 95% of the code is MMX and SSE2, Intel can run it FAR more efficiently on their new architechure than the old x87 instructions.
Thus, P4 may actually be a tool to get the software industry to prepare for a changeover to the new instruction set, by using SSE2 as a "meta-architechure" that will ease this transition.
AMD's policy is obviously "support everything as long as consumers demand it" and this is a very good choice for a here and now let's make money approach. AMD doesn't really have much to worry about for 64bit transition other than convincing developers to port to their architechure, so they aren't concerned if 32bit code hangs around another year or two.
As we know, we're gearing up for a 64bit ballgame. Intel has previously mentioned that there will be a desktop version of Itanium eventually and that it will probably not perform well on existing 32bit code, as it will run this in emulation. The reaction to this has news has been universally negative.
In order to provide best performance on legacy code, it would be nice to have 32bit apps running at least on a semi-modern risc-like instruction set with few of the "traditional" x86 pitfalls.
Hence, by providing SSE2 and including such a poor FPU that developers are all but FORCED to use it, Intel is modernizing the 32bit codebase to a new, more efficent model.
When IA-64 chips hit the desktop, this newer code will be much easier for the 64bit cpu to emulate without as many kludges as older 32bit code. There will probably still be emulated compatability back to 8086, but if 95% of the code is MMX and SSE2, Intel can run it FAR more efficiently on their new architechure than the old x87 instructions.
Thus, P4 may actually be a tool to get the software industry to prepare for a changeover to the new instruction set, by using SSE2 as a "meta-architechure" that will ease this transition.
AMD's policy is obviously "support everything as long as consumers demand it" and this is a very good choice for a here and now let's make money approach. AMD doesn't really have much to worry about for 64bit transition other than convincing developers to port to their architechure, so they aren't concerned if 32bit code hangs around another year or two.
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