76.8GB/s of memory bandwidth in 2004

Page 10 - Seeking answers? Join the Tom's Hardware community: where nearly two million members share solutions and discuss the latest tech.

Raystonn

Distinguished
Apr 12, 2001
2,273
0
19,780
"It's obvious you haven't understood what I've said. And its also obvious that anything I further state on the topic, you won't comprehend either"

Try to be a little less condescending next time and perhaps I will respond to you again. Otherwise I will ignore you as a troll.


"the applications that were mentioned for targeting Yellowstone against will be Line Cards for communications, Game consoles, PC Graphics"

Well look here. It would seem that Yellowstone at these speeds is a possibility after all.


"Cohen did mention use for PC in 6 to 7 years. That's more than an eternity in this business. And still way more than the 2 to 3 years you are suggesting"

First you place words in my mouth by suggesting that I said PCs would be using this memory in 3 years. Then you attack this argument that you set up. This is a classic straw man fallacy. I never said this. I merely said the technology would be available to whomever wished to use it. I ask that you stop acting like a troll with a good dictionary and start contributing something.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =
 

Ncogneto

Distinguished
Dec 31, 2007
2,355
53
19,870
Was the argument whether or not yellowstone could achieve 76.8 GB/s or whether or not 76.8 GB/s could be reasonalbly used in a PC by 2004? I know myself for one was trying to point out that that amount of bandwith would not be practical on any processor that I am aware of today do to the limitations with PCB design. Furthermore my sceptism on yellowstone achieving that is mainly based on whether or not there would be enough of a market for the product after development by that time (2004). It is one thing to produce working silcon in a lab, yet another to employ it into mass production.

Video editing?? Ha, I don't even own a camera!
 
G

Guest

Guest
Ok.. I read this whole thread from beginning to end.. (ya I was bored). My conclusion: Raystonn, there is no way in hell that PC's in 3-4 yrs will be equipped with RDRAM capable of delivering 76.8GB/s of bandwidth. Which you've been <b>implying</b> through out this entire thread. Yes, I can see that technology being used in routers and other specialized hardware.. but PC’s? LMAO!! Maybe if we all had Bill Gates money we could afford such a PC. Ya, ya, go ahead and call me a troll, like you do to everyone else that seems to disagree with you. But I call em like i see em, buddy.
 

Matisaro

Splendid
Mar 23, 2001
6,737
0
25,780
Rayy, you know I respect you, so I will be honest with you.

Salvo has been condecending, but it would also appear he has been right. Salvo, you should learn to keep debates less than personal, but in your defence.

Raystonn IMPLIED that
a: this was a pc technology in 3 years.
b: that salvo was a liar or dilusional when he mentioned talking to people at the rdf specifically several rambus officials.

Raystonn "sure you did" I believe was his reply to salvo claiming to meet someone at the rdf and being told by this person about yellowstone, that came off to me as personal insulting and condecending, so ray you should practice what you preach.

Other than the sligh decent into personal trolling on BOTH sides, this has been a rousing debate and I applaud the members of it.

~Matisaro~
"The Cash Left In My Pocket,The BEST Benchmark"
~Tbird1.3@1.5~
 

FatBurger

Illustrious
A "rousing" debate? Do you have a Northwoody in your pocket, Mat?

<font color=orange>Quarter</font color=orange> <font color=blue>Pounder</font color=blue> <font color=orange>Inside</font color=orange>
 

salvo

Distinguished
Oct 27, 2001
11
0
18,510
Hello Ray,

<"the applications that were mentioned for targeting Yellowstone against will be Line Cards for communications, Game consoles, PC Graphics"

Well look here. It would seem that Yellowstone at these speeds is a possibility after all.>

I have never had a technical problem with yellowstone. For the right application, it will be a great product. My hat is off to Rambus.

I had two problems with your original post though. First off you were stating that the new 32 and 64-bit RIMMS were 32 or 64-bit wide channels. This is incorrect as Rambus will keep thier 16-bit channel architecture with the 32 and 64-bit RIMMs. The advantage of a 32-bit RIMM is that it contains two 16-bit channels and therefore has cost savings of an additional module. You did acknowledge your error.

The second problem I had was you implying yellowstone will be avaliable within 3 years to provide 76.8 GB/s bandwidth for main memory. I had given a number of reasons why this can't happen.

1. Rambus said it won't happen (at RDF)

2. Yellowstone uses differential signals. In current applications, where RSL (Rambus Signal Levels) are used, yellowstone will require twice as many traces on the PCB. Physically, all these traces (CPW or stripline) may not fit on the PCB.

3. The combination of high data rate and very small signal levels (200 mV swing) prohibit use of connectors.

4. 77 GB/s bandwidth is not necessary in 3 years. History shows that PC memory bandwidth doubles every 3 years. That means in about 15 years we'll be looking at 77 GB/s.

Now, you're response has been:
1. I wasn't at RDF
2. nForce does it at 266MHz, so it's no problem to do it at 4.8 GHz.
3. No comment, other than trolling.
4. No comment
 

Raystonn

Distinguished
Apr 12, 2001
2,273
0
19,780
"Raystonn IMPLIED that"

Never assume anything. Just because you read a statement some way does not make it so. Assuming something to be implied is nothing more than an assumption. I never stated any of what you seem to have taken as implied. Go back and read the thread. If you want to make assumptions, then by all means do so. However, that has no bearing in reality on what was actually stated.


"that salvo was a liar or dilusional when he mentioned talking to people at the rdf specifically several rambus officials."

I never called him a liar or delusional. I merely hinted at the fact that I have received information that conflicts with his. Does that mean I was calling him a liar? No. Either one of us may have incorrect information, but both believe theirs to be the truth.


"it would also appear he has been right"

About what? So far I see nothing credible that conflicts with anything I have stated.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =
 

Raystonn

Distinguished
Apr 12, 2001
2,273
0
19,780
"1. Rambus said it won't happen (at RDF)"

What you mean is someone at RDF told you it would not happen. What I am saying is I was told otherwise. Who shall we believe? Since neither point can be proven, this is all hearsay.


"2. Yellowstone uses differential signals. In current applications, where RSL (Rambus Signal Levels) are used, yellowstone will require twice as many traces on the PCB. Physically, all these traces (CPW or stripline) may not fit on the PCB."

I do not see a problem with adding more traces to a motherboard, especially with a few years of research. The nForce had to double the number of traces to go from single channel to dual channel. It can be done with new technologies as well.


"3. The combination of high data rate and very small signal levels (200 mV swing) prohibit use of connectors."

First off, I would be willing to buy a motherboard with integrated RAM if it came with this kind of bandwidth. Second, it is always possible to fashion new connectors with new technology. It may not be possible with the connectors used today, but very little is actually impossible when you put your mind to it.


"4. 77 GB/s bandwidth is not necessary in 3 years. History shows that PC memory bandwidth doubles every 3 years. That means in about 15 years we'll be looking at 77 GB/s."

First off, memory bandwidth used to increase at the same rate as processor speed. We did not always have multiplier rates. The processor would run at the rate of the FSB. It is time that we returned to this practice. I see a real need for more memory bandwidth.

Second, this is completely irrelevant to the argument that it can be technically feasible. What is necessary to me may not be necessary to you. There are people who use 64-bit processors today. Do you? If not, would you then say it is not necessary? If so, then why do they exist? Some people spend tens of thousands of dollars on PC-compatible hardware with extremely high performance. This forum is not dedicated solely to the penny pinchers.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =
 
G

Guest

Guest
Note to Raystonn,

<i>The greatest fool of all is the man who fools himself.</i>
 

Ncogneto

Distinguished
Dec 31, 2007
2,355
53
19,870
Ray, the crux of the argument lies here:

The FSB would indeed need to be increased to make use of all of this bandwidth. However,<b><font color=red> this could easily be done</b></font color=red> by dropping back down to a low multiplier and using a very high FSB clockrate. That 600MHz FSB figure I gave was a bit inaccurate. It would be required to use PC1200 RDRAM at the same dual 16-bit channels (or single 32-bit channel) with the same multipliers. This would only achieve 4.8GB/s of memory bandwidth by itself.
While you are right that you did not say that it would be done in which I will agree, this statement took the intial post off on a bit of a tangent.

Video editing?? Ha, I don't even own a camera!
 
G

Guest

Guest
"I know myself for one was trying to point out that that amount of bandwith would not be practical on any processor that I am aware of today do to the limitations with PCB design."

I don't think any one ever said, or implied that it would be impossible, but just that it might cost more. We may not quite need it today but that step is just around the corner.

I think it may be necessary to have these kinds of bandwidths regardless of any PCB design costs within reason, to keep the cost of the CPU's within reason. Imagine that if CPU's of today are ~75% cache, then how much cache is going to be necessary when we have 10GHz processors, and our FSB speed doesn't increase. If the bandwidth of the memory does not keep up with CPU's we will be buying square inch sized CPU with one little tiny spec in the corner which is actual CPU, while the rest is all SRAM. That is really what will end up costing a fortune, and not some fancy PCB resin material.
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
Oye-Vey!

It took me an hour to just get back up to speed with this thread. I thought that this thread died a few days ago. Welcome to the new guys and their wisdom. I follow you but I can't say I could regurgitate the information for an exam.

BTW – Fatburger, what day is this in this thread? I lost count…

Okay, now that I feel completely schizophrenic, based on the fact that SDRAM and RDRAM have the same basic structure of DRAM; CAS, RAS, and the precharge are both in SDRAM and RDRAM. Correct?

Okay since they are the same in that respect, then the addition of DDR adds an extra latency step.

SDRAM = 2:2:2

DDRSDRAM = 2:2:2:2 or 2.5:2:2: or 3:2:2:2 or some other combination. The reason that there can be a half step is because there is info on the rising and falling edges of the wave. (Hopefully I said that right) Correct?

I don’t remember how many latency steps there are inherent in RDRAM. (Anyone know?) I also remember from previous research I have done with RDRAM that some of the steps take longer than SDRAM or DDRSDRAM. Also since RDRAM is in series, the longer the pathway the longer one or more of the latencies are. (Please correct my statements or fill in the holes in my unlearned in electrical engineering vocabulary.)

Now lastly before I retire for the evening… (Computer show/sale in the morning… I need a new monitor… my last on blew up. Literally)

…ODR Yellowstone, based on the slides from the RDF, will also be operating at DDR… Info on the rising and falling edges of the signal wave.

One last comment…

So as I tried in the past to bring up… is the issue latencies?

Or are the real issues of future main memory in, (1) the direction we head, RDRAM (serial) vs. SDRAM (Parallel) and the technology issues that envelop those memory types or is it (2) that we need a whole new way to handle cache filling other than a matrix format of rows and columns.

Your comments and corrections…

P.S. Please see the direction / concepts that I am trying to across and not just my lack of EE verbiage or the fact that it is 2:30 AM and might sound like a complete and utter moron.

Darren E. Polkowski

BUM_JCRules

<b>Oh Mrs. Green...I'm looking at you...You wore green so you could hide - Caddyshack</b> :lol:
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
One more thing I thought of based on the RDF slides. It is stated that ORD RDRAM will be "8 bits per clock."

This doesn't really happen based on the 50th slide. It shows 4 bits on the rising edges and 4 on the falling edges of 4 different waves. AKA 4 waves for one system clock cycle. But is this really true if 4 cycles happen durring one system clock cycle.

... does this get back to someones argument about 400MHz FSB which is really a Quad (channels) Pumped FSB at 100MHz?

(Maybe channels is not the correct wording here but get my point?)

So is this stuff the same as the RDRAM that we see today but it has a double data rate?

Back to the peanut gallery...

P.S. - Nite all.

<b>Oh Mrs. Green...I'm looking at you...You wore green so you could hide - Caddyshack</b> :lol:
 

Ncogneto

Distinguished
Dec 31, 2007
2,355
53
19,870
We may not quite need it today but that step is just around the corner.
Relative terms such as this are pointless in a debate in which the whole topic of debate is the timeline itself. Nobody ever question the fact that yes someday bandwith like this would be needed and advantageous.

I think it may be necessary to have these kinds of bandwidths regardless of any PCB design costs within reason, to keep the cost of the CPU's within reason.
Your only arguing using just half of the statement I made, please note I was refering to current processors. Truth of the matter is it would be much more practical and in my opinion easier to design a processor around this technology ( much like the p4 was with RDRAM in mind) then to try to design a motherboard that would allow its use with todays current crop of processor's.
Imagine that if CPU's of today are ~75% cache, then how much cache is going to be necessary when we have 10GHz processors, and our FSB speed doesn't increase.
Nobody said they wouldn't increase...most certainly they will. Some of us just don't beleive thay will increase from 100/133mhz to 2.4 ghz in that short of time period.

One can argue all they want how nothing is impossible ( a common misbelief...many things are) but while that may hold true in this case it would be impractical at best when other solutions certainly would seem more feasable such as ondie memory controllers or even 128 or 256 bit pathways from the cpu to the MCH.


Video editing?? Ha, I don't even own a camera!
 

Ncogneto

Distinguished
Dec 31, 2007
2,355
53
19,870
ORD dram is not really Octal it merely performs as such. In practice it is quad but the carrier wave is multiplied by x2 giving it an effective Octal performance.

Video editing?? Ha, I don't even own a camera!
 
G

Guest

Guest
Please keep in mind that I argue with the firm belief that it would be most desirable to have sufficient RAM performance to eliminate the cache entirely, or at least keep it's size to a minimum. Hopefully it will become clear why I have mentioned this.

"Relative terms such as this are pointless in a debate in which the whole topic of debate is the timeline itself."

Your right. I had a point, but I was being too lazy to make it more clearly. Here is me trying to clarify what I said:
OK I'll use someone elses numbers (call me lazy). Someone threw out the example: we need 30 bytes per execution cycle to take full advantage of all the hardware available on our CPU's. The number might be wrong, but it works OK for the point I want to make. Now I make up a number: an execution cycle takes some number of clock cycles, call it 3 for the sake of argument. So there is (2e9/3)*30=20GB/s necessary to satisfy the CPU's of today (2GHz) with as much data as it needs so it doesn't have to wait. The point I wanted to make was that CPUs only have to increase clock speed by a little over a factor of 3 in order to go beyond the capabilities of a 76.8GB/s memory interface to keep a no cache CPU supplied sufficiently with data without waiting. So call it relative, but it aint gonna be long until 6+GHz, OK maybe a year or two, I really wouldn't know. Sorry about not making myself more clear the first time.

"Truth of the matter is it would be much more practical and in my opinion easier to design a processor around this technology ( much like the p4 was with RDRAM in mind) then to try to design a motherboard that would allow its use with todays current crop of processor's."

Please correct me if I'm wrong but the only modifications in current designs, which would be necessary, would be in the memory controller and the PCB. The current CPU's could be used, but it might not be a bad idea to get rid of quite a load of the on die cache, and reduce die size by ~75%. Admittedly some would almost certainly still be necessary for data synch'ing, I'm guessing.

"Some of us just don't beleive thay will increase from 100/133mhz to 2.4 ghz in that short of time period."

I'm not trying to say that this is going to happen, just that if these parts are available it might be worth it to *try* to make use of them.

As to that last paragraph: First, I don't really think you know (again I could be wrong) that it would be impossible to get this memory working in a PC. Second, hey, I'm all for shoving everything possible on die, never said I wasn't.
 

Ncogneto

Distinguished
Dec 31, 2007
2,355
53
19,870
As to that last paragraph: First, I don't really think you know (again I could be wrong) that it would be impossible to get this memory working in a PC.
You misunderstood me so let me clarfy. I attacked the silly phrase "nothing is impossible" then meant to say that I did not beleive that making a PCB/MCH to run these high frequencies was impossible ( remember I am still arguing from withing the original timeframe) it was impratical.

Video editing?? Ha, I don't even own a camera!
 

Ncogneto

Distinguished
Dec 31, 2007
2,355
53
19,870
The current CPU's could be used, but it might not be a bad idea to get rid of quite a load of the on die cache, and reduce die size by ~75%. Admittedly some would almost certainly still be necessary for data synch'ing, I'm guessing.
Rather amusing tidbit, some are suggesting integrating the actual system memory, GPU, MCH into the cpu, while you take the opposite approach. While no expert on the matter I have read that there is a point in diminishing returns in die shrinks and while what you suggest would help reduce the cost/size of the die I wonder about the smaller surface area and the resultant effect on cooling? Furthermore, I don't think total elimination of ondie cache is practical for various reasons.


Video editing?? Ha, I don't even own a camera!
 
G

Guest

Guest
You are most certainly, and beyond a shadow of a doubt maybe correct.

It's been real. Time for sleeping in this corner of the universe.
 
G

Guest

Guest
OK, one more before bed.

I wish for on die memory too. It's just that I see that as being even further out, timewise, than the possibility of screaming fast off die RAM.

You raise good points about size vs. thermal issues etc. To that all I can say is I wish I knew more about these implications. That's just not something I would have a real world kind of feel for.

"I don't think total elimination of on die cache is practical for various reasons."

me either, I just wonder if there might be advantages to sticking it on a big diet.
 

Matisaro

Splendid
Mar 23, 2001
6,737
0
25,780
::digs the thread up from the grave::

While surfing the web for tech info I came upon this.


http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=391&Thread=1&entryID=2774&roomID=13

The guy is CLEARLY talking about rayys post and I applaud him for making a topic which is quoted on other forums.


then

http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=391&Thread=2&entryID=2776&roomID=13

the guy lays it down just like salvo said, very interesting read.


let the rambus debate resume!

~Matisaro~
"The Cash Left In My Pocket,The BEST Benchmark"
~Tbird1.3@1.5~
 

lhgpoobaa

Illustrious
Dec 31, 2007
14,462
1
40,780
i read that hammer is gonna have an integrated onboard northbridge... that should improve memory interface bandwidth and latencies.

course its all hot air at the moment
i want benchmarks dammit! :)

OEMs selling "High End"PCs with integrated video will be forced into Q3tournaments using a TNT2M64!
 

Schmide

Distinguished
Aug 2, 2001
1,442
0
19,280
<A HREF="http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=391&Thread=1&entryID=2774&roomID=13" target="_new">http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=391&Thread=1&entryID=2774&roomID=13</A>

<A HREF="http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=391&Thread=2&entryID=2776&roomID=13" target="_new">http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=391&Thread=2&entryID=2776&roomID=13</A>

Just making things clickable
 

mala

Distinguished
Oct 12, 2001
45
0
18,530
Great thread!

Raystonn:
About the latencies:

The link called "reality" was great. I think many of us (including me) thought that you were saying that latency of DDR-SDRAM would increase as bandwidth increases. But what you meant was that DDR has higher latency compared to SDR all things equal? The link suggests this. I can't really understand why this would be, but the author seems to know his subject so I accept his numbers.

Generally speaking though, latency is not really dependent on interface technology. All modern memory technologies puts a synchronous interface around an asynchronous dram chip. As you increase the frequency (bandwidth) you have to increase the strobe timings as well because the inner latency cannot be lowered when measured in nanoseconds.

So my guess is that both RDRAM and SDRAM will get lower latencies as frequency increases, but it will not be a great improvement for any technology as only the burst time will decrease as frequency goes higher.

LGHPooBaa:
about integrated nothbridge giving improved latency.

I can't see how this would improve latency very much. I think the reason for integrating the north bridge has do do with reducing cost, and to make sure that each processor gets a dedicated NB. As I see it, the gain would be the overhead of sending commands to and processing them on an off-die north bridge. If this overhead is any cycles at all, I belive the number is very small.

about cache:
No matter how fast dram-memory we get we would probably still need some sram-cache. The latencies measured in (processor-)cycles are huge with dram, and it will be even worse in the future. Also, at 10Ghz light travels 3cm per clock. Any component farther away than 1.5cm would have 1 clock latency no matter what technology it uses.
But, if we could get 76.8GB/s bandwidth by 2004 as this thread suggests, maybe we wouldn't need to increase the cache from the 256kb of today.

I would be surprised if all the things I wrote were correct. Please correct me if I'm wrong!
/Markus
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
Just for semantics...Light basically will travel at the same speed regardless of the frequency. (The only thing that will change distance is the medium of transport. The speed, using a fixed timeframe, will effect the distance based on the medium that it travels through. I.E. Water, Air, Glass, etc.)

Frequency only determines the number of sets of instructions that get there in that given timeframe. Based on the point that latencies due to distance do exist and can get shorter due to a shorter distance traveled, if RAM, SRAM or some form of DRAM, were to be on die, it would yield some decrease in latency and would continue to decrease as the die architecture decreased in size due to shorter circuit pathways.

I know that was a mouthful but in layman's terms if RAM were put on die it would yield some reductions in the time it takes to complete one cycle.

This would be the same for any circuit pathway, Northbridge, Southbridge, etc. Whatever you make smaller and closer together will run faster.

One more thought, on your statement on strobe timings, increasing the frequency would not call for a longer strobe. A longer strobe would be necessary if you increased the size of the matrix like 32 bit to 64 bit. Like SDRAM to DDR to QDR to ODR. SDRAM has a 2:2:2 configuration and DDR has a 2:2:2:2. It means one more strobe but not necessarily a longer strobe.


<b>All for one and one for all...and 3 for 5! - Curly - The Three Stooges</b> :lol: