Athlon with HT?

[amoretto]

Alienware offers an AMD Athlon 64 with HT technology. How can this be? I thought intel only offered HT, and how can youadd it to an AMD processor?

 

[endyen]

The HT is question stands for Hyper Transport, not Hyper Threading, or Ham and Tomato.

 

[Rugger]

*ROFL*

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<font color=red>You're a boil on the arse of progress - don't make me squeeze you!</font color=red>

 

[Nights_L]

I've even seen some stores' adver saying they have "Intel Pentium IV with HT technology (Hyper Transport)"
...

 

[endyen]

Sis was talking about making a chipset for intel boards that used an HyperTransport style bus. In this case though, it's probably just stupid people.

 

[tedlogun]

doesn't the Nforce4 intel edition have a hyper transport bus connecting the two logic cores and regular FSB to the CPU (which supports hyper threading)

that's really going to marketing, two technologys both saying: 'with HT support'

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great minds think alike, fools seldom differ...

 

[mrmonsoon]

Here is a link describing hypertransport:

<A HREF="http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_861_1030,00.html" target="_new">http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_861_1030,00.html</A>

Here is alink describing hyperthreading:

<A HREF="http://www.intel.com/technology/hyperthread/" target="_new">http://www.intel.com/technology/hyperthread/</A>

As you will read, they are too very different technologies-although I would love to see A64's and FX chips ith hyperthreading.

 

[slvr_phoenix]

As you will read, they are too very different technologies-although I would love to see A64's and FX chips ith hyperthreading.

And Xeons with Hyper Transport.

<pre> 😱 <font color=purple>I express to you a hex value 84 with my ten binary 'digits'. 😱 </font color=purple></pre><p>@ 185K -> 200,000 miles or bust!

 

[endyen]

doesn't the Nforce4 intel edition have a hyper transport bus connecting the two logic cores

What 2 logical cores?
If you mean the north and south bridges, yes. Nvidia has adopted a hypertransport type bus, but only to connect the 2 bridges. It may not offer much over the pci-exp bus, but it may be easier for nvidia.

 

[tedlogun]

i do mean the north ad south bridges, i must have read somewhere they are called 'integrated logic cores' or something of the sort

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great minds think alike, fools seldom differ...