Speed step and Speed shift are part of the power saving features of the Intel architecture. As explained below. Personally, I recommend leaving Speed step enabled (Even on overclocked systems) and leaving Speed shift disabled, because I've rarely seen Speed shift work correctly anyhow, but speed step is an integral part of the power and thermal management operations of the Intel processor architecture.
Speed Shift:
Intel Speed Shift technology also known as HWP (Hardware p-state) or Hardware Controlled Performance delivers quicker responsiveness with short duration performance shifts, by allowing the processor to more quickly select its best operating frequency and voltage for optimal performance and power efficiency.
Speed step:
What is Enhanced Intel Speedstep® Technology?
Enhanced Intel SpeedStep® Technology allows the system to dynamically adjust processor voltage and core frequency, decreasing average power consumption and heat production.
By decreasing power and heat on desktop PCs, system builders can potentially lower acoustics, depending on system configurations. They can also develop more innovative small form factor designs.
The feature also helps address power concerns in companies with sites approaching the limits of bounded electrical infrastructures. Combined with existing power-saving features, Enhanced Intel SpeedStep Technology can provide balance between power production and consumption. It uses design strategies that include the following:
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- Separation between voltage and frequency changes. Stepping voltage up and down in small increments separately from frequency changes allows the processor to reduce periods of system unavailability (which occur during frequency change). The system can transition between voltage and frequency states more often, providing improved power/performance balance.
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- Clock partitioning and recovery. The bus clock continues running during state transition, when the core clock and phase-locked loop are stopped. Logic remains active. The core clock can also restart more quickly under Enhanced Intel SpeedStep Technology than under previous architectures.
Because Enhanced Intel SpeedStep Technology reduces the latency associated with changing the voltage/frequency pair (referred to as P-state), those transitions can be undertaken more often. More-granular, demand-based switching and optimization of the power/performance balance is enabled.