[SOLVED] Where does this PCIEX4 slot share bandwidth - LGA1200 or Z590? Diagram and Manual do not specify

[8protons]

In the manual to this ASUS Prime Z590-a motherboard, there is a page dedicated to shared bandwidth on Page XI. What is strange to me is that the PCIEX4 is unspecified.

It's clear from the image, charts, and reading the manual that:

• PCIEX16_1, PCIEX16_2, and PCIEX16_3 share lanes
• M.2_2 and M.2_3 will share lanes with PCIEX16_# slots if in PCIe configuration
• M.2_3 and M.2_3 will take lanes from SATA6G_2 and SATA6G_6, respectively, if run in SATA mode.
• M.2_1 will share lanes with PCIEX16_#

But what about the PCIEX4 slot? Does this have lanes directly connected to LGA1200 or the Z590 bridge?

And if it directly shares lanes with PCIEX16_# and M.2_1, what would be the result of something like:

1. M.2_1 - contains NVMe
2. PCIEX16_1 - contains GPU
3. PCIEX4 - contains network card

Would this run in a x4, x8, x4 configuration?

 

[hotaru.hino]

The M.2_1 slot has dedicated lanes from the CPU. The three PCIe x16 slots share lanes from the CPU. The rest are from the chipset.

 

[8protons]

The M.2_1 slot has dedicated lanes from the CPU. The three PCIe x16 slots share lanes from the CPU. The rest are from the chipset.

Wont that add up to more than 20 lanes though? Which not a lot of CPU's support? 4 lanes (M.2_1 slot) + 16 lanes (PCIEX16) + 24 (Z590)? How does that work?

 

[kanewolf]

Wont that add up to more than 20 lanes though? Which not a lot of CPU's support? 4 lanes (M.2_1 slot) + 16 lanes (PCIEX16) + 24 (Z590)? How does that work?

You answered it yourself, the CPU has 20 lanes (M.2 plus graphics). The motherboard chipset is independent.

 

[Zerk2012]

In the manual to this ASUS Prime Z590-a motherboard, there is a page dedicated to shared bandwidth on Page XI. What is strange to me is that the PCIEX4 is unspecified.

It's clear from the image, charts, and reading the manual that:

• PCIEX16_1, PCIEX16_2, and PCIEX16_3 share lanes
• M.2_2 and M.2_3 will share lanes with PCIEX16_# slots if in PCIe configuration
• M.2_3 and M.2_3 will take lanes from SATA6G_2 and SATA6G_6, respectively, if run in SATA mode.
• M.2_1 will share lanes with PCIEX16_#

But what about the PCIEX4 slot? Does this have lanes directly connected to LGA1200 or the Z590 bridge?

And if it directly shares lanes with PCIEX16_# and M.2_1, what would be the result of something like:

1. M.2_1 - contains NVMe
2. PCIEX16_1 - contains GPU
3. PCIEX4 - contains network card

Would this run in a x4, x8, x4 configuration?

If you look at page 6 it says the PCI-E X4 slot runs of the chipset so not the CPU.

 

[8protons]

You answered it yourself, the CPU has 20 lanes (M.2 plus graphics). The motherboard chipset is independent.

So the M.2 + PCIe16 runs directly to the CPU, and the rest run directly to the North and/or South bridges? I thought I've seen posts/blogs that PCI used for network cards or other M.2 slots will share the same lanes as the one as the PCIE16?

 

[SkyNetRising]

It's clear from the image, charts, and reading the manual that:

• PCIEX16_1, PCIEX16_2, and PCIEX16_3 share lanes

Yes.

• M.2_2 and M.2_3 will share lanes with PCIEX16_# slots if in PCIe configuration

No.

• M.2_3 and M.2_3 will take lanes from SATA6G_2 and SATA6G_6, respectively, if run in SATA mode.

Yes.

• M.2_1 will share lanes with PCIEX16_#

No.

But what about the PCIEX4 slot? Does this have lanes directly connected to LGA1200 or the Z590 bridge?

PCIEX4 is chipset connected.

And if it directly shares lanes with PCIEX16_# and M.2_1, what would be the result of something like:

1. M.2_1 - contains NVMe
2. PCIEX16_1 - contains GPU
3. PCIEX4 - contains network card

Would this run in a x4, x8, x4 configuration?

Not exactly. PCIEX16_1 will run at x16, if PCIEX16_2,PCIEX16_3 are unoccupied.
So - x4, x16, x4

 

[hotaru.hino]

Wont that add up to more than 20 lanes though? Which not a lot of CPU's support? 4 lanes (M.2_1 slot) + 16 lanes (PCIEX16) + 24 (Z590)? How does that work?

The CPU has 20 lanes for peripheral use. 4 is for the main M.2 slot. 16 is split between the PCIe x16 slots. The CPU has a dedicated channel called DMI to talk to the chipset, which everything else goes through that.

So the chipset provides 24 lanes that can be used in any which way, but it's still talking to the CPU through DMI.

 

[8protons]

Yes.

No.

Yes.

No.

PCIEX4 is chipset connected.

Not exactly. PCIEX16_1 will run at x16, if PCIEX16_2,PCIEX16_3 are unoccupied.
So - x4, x16, x4

I've seen across a lot of forums people warning others that their M.2_x slots will take up lanes from their PCIE16_x, effectively making it an 8x. Is this unfounded?

 

[hotaru.hino]

I've seen across a lot of forums people warning others that their M.2_x slots will take up lanes from their PCIE16_x, effectively making it an 8x. Is this unfounded?

No, as some motherboards do this (example, MSI B450M Mortar Titanium). But it depends on the motherboard and shouldn't be taken as a blanket statement

 

[SkyNetRising]

I've seen across a lot of forums people warning others that their M.2_x slots will take up lanes from their PCIE16_x, effectively making it an 8x. Is this unfounded?

Depends on motherboard. Doesn't apply for this one.