My understanding was
Speed Select Technology (SST) - Incorporating SST-CP/BF/TF where specific cores clock higher and reduce lower priority, P1 of specific cores increased and reduces for others and high turbo frequency P0n reduces for others respectively. What exactly controls this?
Speed Shift - P-state/Voltage control handed to the HW itself- presumably the BMC? How does this differ to SST?
Speed Step - P-state control happens via the OS e.g. VMware ESXi
Can anyone explain the difference between the three please?
Speed Select Technology (SST) - Incorporating SST-CP/BF/TF where specific cores clock higher and reduce lower priority, P1 of specific cores increased and reduces for others and high turbo frequency P0n reduces for others respectively. What exactly controls this?
Speed Shift - P-state/Voltage control handed to the HW itself- presumably the BMC? How does this differ to SST?
Speed Step - P-state control happens via the OS e.g. VMware ESXi
Can anyone explain the difference between the three please?